Thread (20 messages) 20 messages, 4 authors, 2024-01-25

[PATCH net-next 01/13] bnxt_en: Fix trimming of P5 RX and TX rings

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From: Michael Chan <michael.chan@broadcom.com>
Date: 2023-12-12 00:51:45
Subsystem: broadcom bnxt_en 50 gigabit ethernet driver, networking drivers, the rest · Maintainers: Michael Chan, Pavan Chebbi, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds

Revision v1 of 11 in this series; 1 review trailer (1 from subsystem maintainers); landed in mainline as f1e50b276d37 on 2023-12-13.

Revisions (11)
  1. v1
  2. v1
  3. v2 [diff vs current]
  4. v1
  5. v1 current
  6. v1
  7. v2 [diff vs current]
  8. v3 [diff vs current]
  9. v4 [diff vs current]
  10. v1
  11. v2 [diff vs current]
The recent commit to trim the RX and TX rings on P5 chips by assigning
each with max CP rings divided by 2 is not correct.  Max CP rings
divided by 2 may be bigger than the original RX or TX and would
lead to failure.  In other words, we may be checking for increased
RX/TX rings than required and it may fail.

Fix it by calling __bnxt_trim_rings() instead that would properly
trim RX and TX without the possibility of increasing their values.

Fixes: f5b29c6afe36 ("bnxt_en: Add helper to get the number of CP rings required for TX rings")
Reviewed-by: Pavan Chebbi <pavan.chebbi@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
---
 drivers/net/ethernet/broadcom/bnxt/bnxt.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
index 92a54113f872..7afbbc71f92f 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
@@ -6489,6 +6489,8 @@ static void bnxt_hwrm_ring_free(struct bnxt *bp, bool close_path)
 	}
 }
 
+static int __bnxt_trim_rings(struct bnxt *bp, int *rx, int *tx, int max,
+			     bool shared);
 static int bnxt_trim_rings(struct bnxt *bp, int *rx, int *tx, int max,
 			   bool shared);
 
@@ -6532,8 +6534,9 @@ static int bnxt_hwrm_get_rings(struct bnxt *bp)
 			if (bp->flags & BNXT_FLAG_AGG_RINGS)
 				rx >>= 1;
 			if (cp < (rx + tx)) {
-				rx = cp / 2;
-				tx = rx;
+				rc = __bnxt_trim_rings(bp, &rx, &tx, cp, false);
+				if (rc)
+					return rc;
 				if (bp->flags & BNXT_FLAG_AGG_RINGS)
 					rx <<= 1;
 				hw_resc->resv_rx_rings = rx;
@@ -13885,9 +13888,12 @@ static void _bnxt_get_max_rings(struct bnxt *bp, int *max_rx, int *max_tx,
 	if (bp->flags & BNXT_FLAG_AGG_RINGS)
 		*max_rx >>= 1;
 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
-		if (*max_cp < (*max_rx + *max_tx)) {
-			*max_rx = *max_cp / 2;
-			*max_tx = *max_rx;
+		int rc;
+
+		rc = __bnxt_trim_rings(bp, max_rx, max_tx, *max_cp, false);
+		if (rc) {
+			*max_rx = 0;
+			*max_tx = 0;
 		}
 		/* On P5 chips, max_cp output param should be available NQs */
 		*max_cp = max_irq;
-- 
2.30.1

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