Re: [PATCH v3 2/6] net: phy: introduce core support for phy-mode = "10g-qxgmii"

On 11/15/2023 10:31 PM, Conor Dooley wrote:

On Wed, Nov 15, 2023 at 10:06:26PM +0800, Luo Jie wrote:

quoted

From: Vladimir Oltean <vladimir.oltean@nxp.com>

10G-QXGMII is a MAC-to-PHY interface defined by the USXGMII multiport
specification. It uses the same signaling as USXGMII, but it multiplexes
4 ports over the link, resulting in a maximum speed of 2.5G per port.

Some in-tree SoCs like the NXP LS1028A use "usxgmii" when they mean
either the single-port USXGMII or the quad-port 10G-QXGMII variant, and
they could get away just fine with that thus far. But there is a need to
distinguish between the 2 as far as SerDes drivers are concerned.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Luo Jie <redacted>
---
  .../devicetree/bindings/net/ethernet-controller.yaml |  1 +

I know it is one line, but bindings need to be in their own patches
please.

Ok, will split the binding change out as a separate patch.
Thanks Conor for the suggestion.