Re: [net-next PATCH v4 03/14] net: dsa: qca8k: add LEDs blink_set() support
From: Christian Marangi <ansuelsmth@gmail.com>
Date: 2023-03-17 14:03:37
Also in:
linux-arm-kernel, linux-arm-msm, linux-devicetree, linux-leds, lkml
On Fri, Mar 17, 2023 at 12:54:09PM +0100, Michal Kubiak wrote:
On Fri, Mar 17, 2023 at 03:31:14AM +0100, Christian Marangi wrote:quoted
Add LEDs blink_set() support to qca8k Switch Family. These LEDs support hw accellerated blinking at a fixed rate of 4Hz. Reject any other value since not supported by the LEDs switch. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> --- drivers/net/dsa/qca/qca8k-leds.c | 38 ++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+)diff --git a/drivers/net/dsa/qca/qca8k-leds.c b/drivers/net/dsa/qca/qca8k-leds.c index adbe7f6e2994..c229575c7e8c 100644 --- a/drivers/net/dsa/qca/qca8k-leds.c +++ b/drivers/net/dsa/qca/qca8k-leds.c@@ -92,6 +92,43 @@ qca8k_led_brightness_get(struct qca8k_led *led) return val == QCA8K_LED_ALWAYS_ON; } +static int +qca8k_cled_blink_set(struct led_classdev *ldev, + unsigned long *delay_on, + unsigned long *delay_off) +{ + struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); + u32 mask, val = QCA8K_LED_ALWAYS_BLINK_4HZ; + struct qca8k_led_pattern_en reg_info; + struct qca8k_priv *priv = led->priv; + + if (*delay_on == 0 && *delay_off == 0) { + *delay_on = 125; + *delay_off = 125; + } + + if (*delay_on != 125 || *delay_off != 125) { + /* The hardware only supports blinking at 4Hz. Fall back + * to software implementation in other cases. + */ + return -EINVAL; + } + + qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); + + if (led->port_num == 0 || led->port_num == 4) { + mask = QCA8K_LED_PATTERN_EN_MASK; + val <<= QCA8K_LED_PATTERN_EN_SHIFT; + } else { + mask = QCA8K_LED_PHY123_PATTERN_EN_MASK; + }Could you add a comment as to why the HW requires different approaches for inner and outer ports?
Will add some comments, but for reference, it's really just how the switch regs setup these and provide access and configuration from them. phy0 and phy4 are in a reg, phy1-2-3 are in a separate table with different shift and mask.
quoted
+ + regmap_update_bits(priv->regmap, reg_info.reg, mask << reg_info.shift, + val << reg_info.shift); + + return 0; +} + static int qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num) {@@ -149,6 +186,7 @@ qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int p port_led->cdev.max_brightness = 1; port_led->cdev.brightness_set_blocking = qca8k_cled_brightness_set_blocking; + port_led->cdev.blink_set = qca8k_cled_blink_set; init_data.default_label = ":port"; init_data.devicename = "qca8k"; init_data.fwnode = led;-- 2.39.2Thanks, Michal
-- Ansuel