Re: [PATCH net v3 2/2] r8169: fix dmar pte write access is not set error
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: 2022-12-26 12:48:05
On 26.12.2022 13:31, Chunhao Lin wrote:
When close device, if wol is enabled, rx will be enabled. When open device it will cause rx packet to be dma to the wrong memory address after pci_set_master() and system log will show blow messages. DMAR: DRHD: handling fault status reg 3 DMAR: [DMA Write] Request device [02:00.0] PASID ffffffff fault addr ffdd4000 [fault reason 05] PTE Write access is not set In this patch, driver disable tx/rx when close device. If wol is enabled, only enable rx filter and disable rxdv_gate(if support) to let hardware only receive packet to fifo but not to dma it. Signed-off-by: Chunhao Lin <redacted>
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>