[PATCH net-next 1/3] net: pcs: altera-tse: use read_poll_timeout to wait for reset
From: Maxime Chevallier <maxime.chevallier@bootlin.com>
Date: 2022-11-25 13:18:17
Also in:
linux-arm-kernel, linux-devicetree, lkml
Subsystem:
ethernet phy library, networking drivers, the rest · Maintainers:
Andrew Lunn, Heiner Kallweit, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
Software resets on the TSE PCS don't clear registers, but rather reset all internal state machines regarding AN, comma detection and encoding/decoding. Use read_poll_timeout to wait for the reset to clear instead of manually polling the register. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> --- drivers/net/pcs/pcs-altera-tse.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/net/pcs/pcs-altera-tse.c b/drivers/net/pcs/pcs-altera-tse.c
index 97a7cabff962..e86cadc391e8 100644
--- a/drivers/net/pcs/pcs-altera-tse.c
+++ b/drivers/net/pcs/pcs-altera-tse.c@@ -60,7 +60,6 @@ static void tse_pcs_write(struct altera_tse_pcs *tse_pcs, int regnum, static int tse_pcs_reset(struct altera_tse_pcs *tse_pcs) { - int i = 0; u16 bmcr; /* Reset PCS block */
@@ -68,13 +67,9 @@ static int tse_pcs_reset(struct altera_tse_pcs *tse_pcs) bmcr |= BMCR_RESET; tse_pcs_write(tse_pcs, MII_BMCR, bmcr); - for (i = 0; i < SGMII_PCS_SW_RESET_TIMEOUT; i++) { - if (!(tse_pcs_read(tse_pcs, MII_BMCR) & BMCR_RESET)) - return 0; - udelay(1); - } - - return -ETIMEDOUT; + return read_poll_timeout(tse_pcs_read, bmcr, (bmcr & BMCR_RESET), + 10, SGMII_PCS_SW_RESET_TIMEOUT, 1, + tse_pcs, MII_BMCR); } static int alt_tse_pcs_validate(struct phylink_pcs *pcs,
--
2.38.1