On Thu, 2022-08-11 at 08:07 +0000, Philippe Schenker wrote:

On Wed, 2022-08-10 at 20:40 +0200, Philipp Rossak wrote:

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Hi Marcel,

thanks!

With the removed line it is working now!

I hope there will be a mainlined solution soon.

Yes, I am still hoping for more information from NXP on that matter.

@NXP: Anybody?

This is an interesting question. Since it's a SCFW issue and a general
question about these SoCs, I'll take the liberty of hijacking this
thread for some questions (since NXP is also in the loop now).

@NXP people: which SCFW version should be used in general with mainline
linux-kernel ?
And how is it planned to proceed with SC-firmware enabled SoCs on
mainline linux?
Is the SCFW API backward compatible?
If so, from which version on?

Thanks in advance for enlightening us all on this SCFW issue.

Philippe

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Cheers
Philipp

On 10.08.22 10:05, Marcel Ziswiler wrote:

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Sali Philipp

On Wed, 2022-08-10 at 00:55 +0200, Philipp Rossak wrote:

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Hi,

I currently have a project with a Toradex Colibri IMX8X SOM
board> >> whith
an onboard Micrel KSZ8041NL Ethernet PHY.

The hardware is described in the devictree properly so I
expected> >> that
the onboard Ethernet with the phy is working.

Currently I'm not able to get the link up.

I already compared it to the BSP kernel, but I didn't found>

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anything

helpful. The BSP kernel is working.

Do you know if there is something in the kernel missing and
got it> >> running?

Yes, you may just revert the following commit babfaa9556d7
("clk:> >imx: scu: add more scu clocks")

Alternatively, just commenting out the following single line
also> >helps:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/clk/imx/clk-imx8qxp.c?h=v5.19#n172

I just found this out about two weeks ago before I went to
vacation> >and since have to find out with NXP what
exactly the idea of this clocking/SCFW stuff is related to our>

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hardware.

@NXP: If any of you guys could shed some light that would be
much> >appreciated. Thanks!

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Thanks,
Philipp

Cheers

Marcel