RE: [PATCH net-next 2/2] net: macb: Add zynqmp SGMII dynamic configuration support
From: "Pandey, Radhey Shyam" <radhey.shyam.pandey@amd.com>
Date: 2022-07-25 13:26:31
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-----Original Message----- From: Claudiu.Beznea@microchip.com <redacted> Sent: Friday, July 22, 2022 2:22 PM To: Pandey, Radhey Shyam <radhey.shyam.pandey@amd.com>; michal.simek@xilinx.com; Nicolas.Ferre@microchip.com; davem@davemloft.net; edumazet@google.com; kuba@kernel.org; pabeni@redhat.com; gregkh@linuxfoundation.org; ronak.jain@xilinx.com Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; netdev@vger.kernel.org; git@xilinx.com; git (AMD-Xilinx) [off-list ref] Subject: Re: [PATCH net-next 2/2] net: macb: Add zynqmp SGMII dynamic configuration support On 22.07.2022 11:12, Radhey Shyam Pandey wrote:quoted
EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe Add support for the dynamic configuration which takes care of configuring the GEM secure space configuration registers using EEMI APIs. High level sequence is to: - Check for the PM dynamic configuration support, if no error proceed with GEM dynamic configurations(next steps) otherwise skip the dynamic configuration. - Configure GEM Fixed configurations. - Configure GEM_CLK_CTRL (gemX_sgmii_mode). - Trigger GEM reset. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> --- drivers/net/ethernet/cadence/macb_main.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)diff --git a/drivers/net/ethernet/cadence/macb_main.cb/drivers/net/ethernet/cadence/macb_main.c index 7eb7822cd184..97f77fa9e165 100644--- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c@@ -38,6 +38,7 @@ #include <linux/pm_runtime.h> #include <linux/ptp_classify.h> #include <linux/reset.h> +#include <linux/firmware/xlnx-zynqmp.h> #include "macb.h" /* This structure is only used for MACB on SiFive FU540 devices */ @@ -4621,6 +4622,25 @@ static int init_reset_optional(struct platform_device*pdev)quoted
"failed to init SGMII PHY\n"); } + ret = zynqmp_pm_is_function_supported(PM_IOCTL,IOCTL_SET_GEM_CONFIG);quoted
+ if (!ret) { + u32 pm_info[2]; + + ret = of_property_read_u32_array(pdev->dev.of_node, "power-domains",quoted
+ pm_info, ARRAY_SIZE(pm_info)); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to read power + management information\n");You have to undo phy_init() above (not listed in this diff).
Thanks for the review. I see , will add phy_exit() in this return path and for below error path as well.
quoted
+ return ret; + } + ret = zynqmp_pm_set_gem_config(pm_info[1],GEM_CONFIG_FIXED, 0);quoted
+ if (ret < 0)Same here.quoted
+ return ret; + + ret = zynqmp_pm_set_gem_config(pm_info[1],GEM_CONFIG_SGMII_MODE, 1);quoted
+ if (ret < 0)And here.quoted
+ return ret; + } +> /* Fully reset controller at hardware level if mapped in +> devicetree */quoted
ret = device_reset_optional(&pdev->dev); if (ret) { -- 2.25.1