Thread (13 messages) 13 messages, 4 authors, 2021-12-15

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  1. Posted Shay Drory <shayd@nvidia.com>
  2. Reviewed-by Moshe Shemesh

[PATCH net-next v3 1/7] net/mlx5: Introduce log_max_current_uc_list_wr_supported bit

From: Shay Drory <hidden>
Date: 2021-12-08 14:17:50
Also in: lkml
Subsystem: mellanox mlx5 ib driver, mellanox mlx5 core vpi driver, the rest · Maintainers: Leon Romanovsky, Saeed Mahameed, Tariq Toukan, Mark Bloch, Linus Torvalds

Downstream patch will use this bit in order to know whether the device
supports changing of max_uc_list.

Signed-off-by: Shay Drory <redacted>
Reviewed-by: Moshe Shemesh <redacted>
---
 include/linux/mlx5/mlx5_ifc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index fbaab440a484..e9db12aae8f9 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -1621,7 +1621,7 @@ struct mlx5_ifc_cmd_hca_cap_bits {
 
 	u8         ext_stride_num_range[0x1];
 	u8         roce_rw_supported[0x1];
-	u8         reserved_at_3a2[0x1];
+	u8         log_max_current_uc_list_wr_supported[0x1];
 	u8         log_max_stride_sz_rq[0x5];
 	u8         reserved_at_3a8[0x3];
 	u8         log_min_stride_sz_rq[0x5];
-- 
2.21.3
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