[net-next RFC PATCH v2 8/8] net: dsa: qca8k: cache lo and hi for mdio write
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STALE1762d
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: 2021-12-08 03:41:10
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Subsystem:
networking drivers, networking [dsa], the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn, Vladimir Oltean, Linus Torvalds
Revision v2 of 8 in this series.
Revisions (8)
From Documentation, we can cache lo and hi the same way we do with the page. This massively reduce the mdio write as 3/4 of the time we only require to write the lo or hi part for a mdio write. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> --- drivers/net/dsa/qca8k.c | 49 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 44 insertions(+), 5 deletions(-)
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 5b7508a6e4ba..6f4a99032cdd 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c@@ -94,6 +94,48 @@ qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) *page = regaddr & 0x3ff; } +static u16 qca8k_current_lo = 0xffff; + +static int +qca8k_set_lo(struct mii_bus *bus, int phy_id, u32 regnum, u16 lo) +{ + int ret; + + if (lo == qca8k_current_lo) { + // pr_info("SAME LOW"); + return 0; + } + + ret = bus->write(bus, phy_id, regnum, lo); + if (ret < 0) + dev_err_ratelimited(&bus->dev, + "failed to write qca8k 32bit lo register\n"); + + qca8k_current_lo = lo; + return 0; +} + +static u16 qca8k_current_hi = 0xffff; + +static int +qca8k_set_hi(struct mii_bus *bus, int phy_id, u32 regnum, u16 hi) +{ + int ret; + + if (hi == qca8k_current_hi) { + // pr_info("SAME HI"); + return 0; + } + + ret = bus->write(bus, phy_id, regnum, hi); + if (ret < 0) + dev_err_ratelimited(&bus->dev, + "failed to write qca8k 32bit hi register\n"); + + qca8k_current_hi = hi; + return 0; +} + static int qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val) {
@@ -125,12 +167,9 @@ qca8k_mii_write32(struct mii_bus *bus, int phy_id, u32 regnum, u32 val) lo = val & 0xffff; hi = (u16)(val >> 16); - ret = bus->write(bus, phy_id, regnum, lo); + ret = qca8k_set_lo(bus, phy_id, regnum, lo); if (ret >= 0) - ret = bus->write(bus, phy_id, regnum + 1, hi); - if (ret < 0) - dev_err_ratelimited(&bus->dev, - "failed to write qca8k 32bit register\n"); + ret = qca8k_set_hi(bus, phy_id, regnum + 1, hi); } static int
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2.32.0