On Tue, Dec 07, 2021 at 10:59:19AM +0000, Russell King (Oracle) wrote:
Martyn Welch reports that his CPU port is unable to link where it has
been necessary to use one of the switch ports with an internal PHY for
the CPU port. The reason behind this is the port control register is
left forcing the link down, preventing traffic flow.
This occurs because during initialisation, phylink expects the link to
be down, and DSA forces the link down by synthesising a call to the
DSA drivers phylink_mac_link_down() method, but we don't touch the
forced-link state when we later reconfigure the port.
Resolve this by also unforcing the link state when we are operating in
PHY mode and the PPU is set to poll the PHY to retrieve link status
information.
Reported-by: Martyn Welch <redacted>
Signed-off-by: Russell King (Oracle) <redacted>
Hi Russell
It would be good to have a Fixes: tag here, to help with back porting.
The concept looks good, and i see you now have a Tested-by:, so with
the fixup applied i think you are good to go. Please add my
Reviewed-by: to the next version.
Andrew