Re: [RFC PATCH] net: phy/mdio: enable mmd indirect access through phy_mii_ioctl()

On Wed, Nov 03, 2021 at 20:36, Andrew Lunn [off-list ref] wrote:

On Wed, Nov 03, 2021 at 08:42:07PM +0200, Grygorii Strashko wrote:

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On 03/11/2021 02:27, Andrew Lunn wrote:

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What i find interesting is that you and the other resent requester are
using the same user space tool. If you implement C45 over C22 in that
tool, you get your solution, and it will work for older kernels as
well. Also, given the diverse implementations of this IOTCL, it
probably works for more drivers than just those using phy_mii_ioctl().

Do you mean change uapi, like
  add mdio_phy_id_is_c45_over_c22() and
  flag #define MDIO_PHY_ID_C45_OVER_C22 0x4000?

No, i mean user space implements C45 over C22. Make phytool write
MII_MMD_CTRL and MII_MMD_DATA to perform a C45 over C22.

Now I give up - as mentioned there is now way to sync User space vs Kernel
MMD transactions and so no way to get trusted results.

Except that there is a way: https://github.com/wkz/mdio-tools

I can see that Sean has already mentioned it in the other branch of the
thread (thanks for the plug :)). I have posted it to netdev before:

https://lore.kernel.org/netdev/C42DZQLTPHM5.2THDSRK84BI3T@wkz-x280/ (local)

It allows you to send an entire "MDIO program" to the kernel, where
mdio-netlink will (1) lock the bus, (2) run your program in a small VM,
and (3) unlock the bus.

There are currently two programs in the project:

- `mdio`: A basic register peek/poke program that uses the mdio-netlink
  module in the kernel to do its thing. The source is structured in such
  a way that custom access modes can be easily added. Today there are
  accessors for C22 PHYs, C45 MMDs, Marvell Alaska paged PHYs, Marvell
  LinkStreet switches, and XRS700x switches.

- `mvls`: Specialized read-only debug tool for Marvell LinkStreet
  switches. This does _not_ rely on the mdio-netlink kernel module,
  instead it uses the standard devlink API. Let's you dump the VTU/ATU
  etc.

You could easily add a new addressing mode to `mdio` to do C45-over-C22
accesses. Would that work for you Grygorii?

Except that it will probably work 99% of the time, which is enough for
a debug tool.

Why though, why would we not build something that is rock solid? Ever
since ce69e2162f15, the flood gates are open. Any vendor can implement
mdio-netlink on their own, or just download mine. We are only punishing
ourselves at this point.

phylib is pretty idle most of the time, it just polls
the PHY once a second to see if the link status has changed. And does
not poll at all if interrupts are wired up. And you can always do a
read three times and see if you get the same answer, or do a write
followed by a read to see if the write actually happened correctly, or
corrupted some other register.

As a staunch opponent of Vendor SDKs myself, I get where you are coming
from - really.

I guess I just don't have the brain power to operate this kind of Rube
Goldberg machinery and debug my problems at the same time. We have a
mutex right there already, let's use it!

I'll shut up now - I just had to make one final appeal :)