@@ -1,33 +0,0 @@-* NXP Semiconductors NXP NCI NFC Controllers--Required properties:-- compatible: Should be "nxp,nxp-nci-i2c".-- clock-frequency: I²C work frequency.-- reg: address on the bus-- interrupts: GPIO interrupt to which the chip is connected-- enable-gpios: Output GPIO pin used for enabling/disabling the chip--Optional SoC Specific Properties:-- pinctrl-names: Contains only one value - "default".-- pintctrl-0: Specifies the pin control groups used for this controller.-- firmware-gpios: Output GPIO pin used to enter firmware download mode--Example (for ARM-based BeagleBone with NPC100 NFC controller on I2C2):--&i2c2 {--- npc100: npc100@29 {-- compatible = "nxp,nxp-nci-i2c";-- reg = <0x29>;- clock-frequency = <100000>;-- interrupt-parent = <&gpio1>;- interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;-- enable-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;- firmware-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;- };-};
@@ -1,45 +0,0 @@-* STMicroelectronics : NFC Transceiver ST95HF--ST NFC Transceiver is required to attach with SPI bus.-ST95HF node should be defined in DT as SPI slave device of SPI-master with which ST95HF transceiver is physically connected.-The properties defined below are required to be the part of DT-to include ST95HF transceiver into the platform.--Required properties:-===================-- reg: Address of SPI slave "ST95HF transceiver" on SPI master bus.--- compatible: should be "st,st95hf" for ST95HF NFC transceiver--- spi-max-frequency: Max. operating SPI frequency for ST95HF- transceiver.--- enable-gpio: GPIO line to enable ST95HF transceiver.--- interrupts : Standard way to define ST95HF transceiver's out- interrupt.--Optional property:-=================-- st95hfvin-supply : This is an optional property. It contains a- phandle to ST95HF transceiver's regulator supply node in DT.--Example:-=======-spi@9840000 {- reg = <0x9840000 0x110>;- #address-cells = <1>;- #size-cells = <0>;- cs-gpios = <&pio0 4>;-- st95hf@0{- reg = <0>;- compatible = "st,st95hf";- spi-max-frequency = <1000000>;- enable-gpio = <&pio4 0>;- interrupt-parent = <&pio0>;- interrupts = <7 IRQ_TYPE_EDGE_FALLING>;- };--};
@@ -1,46 +0,0 @@-* NXP Semiconductors PN532 NFC Controller--Required properties:-- compatible: Should be- - "nxp,pn532" Place a node with this inside the devicetree node of the bus- where the NFC chip is connected to.- Currently the kernel has phy bindings for uart and i2c.- - "nxp,pn532-i2c" (DEPRECATED) only works for the i2c binding.- - "nxp,pn533-i2c" (DEPRECATED) only works for the i2c binding.--Required properties if connected on i2c:-- clock-frequency: I²C work frequency.-- reg: for the I²C bus address. This is fixed at 0x24 for the PN532.-- interrupts: GPIO interrupt to which the chip is connected--Optional SoC Specific Properties:-- pinctrl-names: Contains only one value - "default".-- pintctrl-0: Specifies the pin control groups used for this controller.--Example (for ARM-based BeagleBone with PN532 on I2C2):--&i2c2 {--- pn532: nfc@24 {-- compatible = "nxp,pn532";-- reg = <0x24>;- clock-frequency = <400000>;-- interrupt-parent = <&gpio1>;- interrupts = <17 IRQ_TYPE_EDGE_FALLING>;-- };-};--Example (for PN532 connected via uart):--uart4: serial@49042000 {- compatible = "ti,omap3-uart";-- pn532: nfc {- compatible = "nxp,pn532";- };-};
@@ -0,0 +1,98 @@+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause+%YAML1.2+---+$id:http://devicetree.org/schemas/net/nfc/ti,trf7970a.yaml#+$schema:http://devicetree.org/meta-schemas/core.yaml#++title:Texas Instruments TRF7970A RFID/NFC/15693 Transceiver++maintainers:+-Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>+-Mark Greer <mgreer@animalcreek.com>++properties:+compatible:+const:ti,trf7970a++autosuspend-delay:+$ref:/schemas/types.yaml#/definitions/uint32+description:|+Specify autosuspend delay in milliseconds.++clock-frequency:+description:|+Set to specify that the input frequency to the trf7970a is 13560000Hz or+27120000Hz++en2-rf-quirk:+type:boolean+description:|+Specify that the trf7970a being used has the "EN2 RF" erratum++interrupts:+maxItems:1++irq-status-read-quirk:+type:boolean+description:|+Specify that the trf7970a being used has the "IRQ Status Read" erratum++reg:+maxItems:1++spi-max-frequency:true++ti,enable-gpios:+minItems:1+maxItems:2+description:|+One or two GPIO entries used for 'EN' and 'EN2' pins on the TRF7970A. EN2+is optional.++vdd-io-supply:+description:|+Regulator specifying voltage for VDD-IO++vin-supply:+description:|+Regulator for supply voltage to VIN pin++required:+-compatible+-interrupts+-reg+-spi-max-frequency+-ti,enable-gpios+-vin-supply++additionalProperties:false++examples:+-|+#include <dt-bindings/gpio/gpio.h>+#include <dt-bindings/interrupt-controller/irq.h>++i2c {+#address-cells = <1>;+#size-cells = <0>;++nfc@0 {+compatible = "ti,trf7970a";+reg = <0>;++pinctrl-names = "default";+pinctrl-0 = <&trf7970a_default>;+spi-max-frequency = <2000000>;+interrupt-parent = <&gpio2>;+interrupts = <14 0>;++ti,enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>,+<&gpio2 5 GPIO_ACTIVE_HIGH>;+vin-supply = <&ldo3_reg>;+vdd-io-supply = <&ldo2_reg>;+autosuspend-delay = <30000>;+irq-status-read-quirk;+en2-rf-quirk;+clock-frequency = <27120000>;+};+};
@@ -1,43 +0,0 @@-* Texas Instruments TRF7970A RFID/NFC/15693 Transceiver--Required properties:-- compatible: Should be "ti,trf7970a".-- spi-max-frequency: Maximum SPI frequency (<= 2000000).-- interrupts: A single interrupt specifier.-- ti,enable-gpios: One or two GPIO entries used for 'EN' and 'EN2' pins on the- TRF7970A. EN2 is optional.-- vin-supply: Regulator for supply voltage to VIN pin--Optional SoC Specific Properties:-- pinctrl-names: Contains only one value - "default".-- pintctrl-0: Specifies the pin control groups used for this controller.-- autosuspend-delay: Specify autosuspend delay in milliseconds.-- irq-status-read-quirk: Specify that the trf7970a being used has the- "IRQ Status Read" erratum.-- en2-rf-quirk: Specify that the trf7970a being used has the "EN2 RF"- erratum.-- vdd-io-supply: Regulator specifying voltage for vdd-io-- clock-frequency: Set to specify that the input frequency to the trf7970a is 13560000Hz or 27120000Hz--Example (for ARM-based BeagleBone with TRF7970A on SPI1):--&spi1 {-- nfc@0 {- compatible = "ti,trf7970a";- reg = <0>;- pinctrl-names = "default";- pinctrl-0 = <&trf7970a_default>;- spi-max-frequency = <2000000>;- interrupt-parent = <&gpio2>;- interrupts = <14 0>;- ti,enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>,- <&gpio2 5 GPIO_ACTIVE_HIGH>;- vin-supply = <&ldo3_reg>;- vdd-io-supply = <&ldo2_reg>;- autosuspend-delay = <30000>;- irq-status-read-quirk;- en2-rf-quirk;- clock-frequency = <27120000>;- };-};
@@ -1,38 +0,0 @@-* STMicroelectronics SAS. ST NCI NFC Controller--Required properties:-- compatible: Should be "st,st21nfcb-i2c" or "st,st21nfcc-i2c".-- clock-frequency: I²C work frequency.-- reg: address on the bus-- interrupts: GPIO interrupt to which the chip is connected-- reset-gpios: Output GPIO pin used to reset the ST21NFCB--Optional SoC Specific Properties:-- pinctrl-names: Contains only one value - "default".-- pintctrl-0: Specifies the pin control groups used for this controller.-- ese-present: Specifies that an ese is physically connected to the nfc-controller.-- uicc-present: Specifies that the uicc swp signal can be physically-connected to the nfc controller.--Example (for ARM-based BeagleBoard xM with ST21NFCB on I2C2):--&i2c2 {--- st21nfcb: st21nfcb@8 {-- compatible = "st,st21nfcb-i2c";-- reg = <0x08>;- clock-frequency = <400000>;-- interrupt-parent = <&gpio5>;- interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;-- reset-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;-- ese-present;- uicc-present;- };-};
@@ -1,36 +0,0 @@-* STMicroelectronics SAS. ST NCI NFC Controller--Required properties:-- compatible: Should be "st,st21nfcb-spi"-- spi-max-frequency: Maximum SPI frequency (<= 4000000).-- interrupts: GPIO interrupt to which the chip is connected-- reset-gpios: Output GPIO pin used to reset the ST21NFCB--Optional SoC Specific Properties:-- pinctrl-names: Contains only one value - "default".-- pintctrl-0: Specifies the pin control groups used for this controller.-- ese-present: Specifies that an ese is physically connected to the nfc-controller.-- uicc-present: Specifies that the uicc swp signal can be physically-connected to the nfc controller.--Example (for ARM-based BeagleBoard xM with ST21NFCB on SPI4):--&mcspi4 {--- st21nfcb: st21nfcb@0 {-- compatible = "st,st21nfcb-spi";-- clock-frequency = <4000000>;-- interrupt-parent = <&gpio5>;- interrupts = <2 IRQ_TYPE_EDGE_RISING>;-- reset-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;-- ese-present;- uicc-present;- };-};
@@ -0,0 +1,170 @@+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause+%YAML1.2+---+$id:http://devicetree.org/schemas/net/nfc/marvell,nci.yaml#+$schema:http://devicetree.org/meta-schemas/core.yaml#++title:Marvell International Ltd. NCI NFC controller++maintainers:+-Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>++properties:+compatible:+enum:+-marvell,nfc-i2c+-marvell,nfc-spi+-marvell,nfc-uart++hci-muxed:+type:boolean+description:|+Specifies that the chip is muxing NCI over HCI frames++interrupts:+maxItems:1++reg:+maxItems:1++reset-n-io:+$ref:"/schemas/types.yaml#/definitions/phandle-array"+maxItems:1+description:|+Output GPIO pin used to reset the chip (active low)++i2c-int-falling:+type:boolean+description:|+For I2C type of connection. Specifies that the chip read event shall be+trigged on falling edge.++i2c-int-rising:+type:boolean+description:|+For I2C type of connection. Specifies that the chip read event shall be+trigged on rising edge.++break-control:+type:boolean+description:|+For UART type of connection. Specifies that the chip needs specific break+management.++flow-control:+type:boolean+description:|+For UART type of connection. Specifies that the chip is using RTS/CTS.++spi-cpha:true+spi-cpol:true+spi-max-frequency:true++required:+-compatible++allOf:+-if:+properties:+compatible:+contains:+const:marvell,nfc-i2c+then:+properties:+break-control:false+flow-control:false+spi-cpha:false+spi-cpol:false+spi-max-frequency:false+required:+-reg++-if:+properties:+compatible:+contains:+const:marvell,nfc-spi+then:+properties:+break-control:false+flow-control:false+i2c-int-falling:false+i2c-int-rising:false+required:+-reg++-if:+properties:+compatible:+contains:+const:marvell,nfc-uart+then:+properties:+i2c-int-falling:false+i2c-int-rising:false+interrupts:false+spi-cpha:false+spi-cpol:false+spi-max-frequency:false+reg:false++additionalProperties:false++examples:+-|+#include <dt-bindings/gpio/gpio.h>+#include <dt-bindings/interrupt-controller/irq.h>++i2c {+#address-cells = <1>;+#size-cells = <0>;++nfc@8 {+compatible = "marvell,nfc-i2c";+reg = <0x8>;++interrupt-parent = <&gpio3>;+interrupts = <21 IRQ_TYPE_EDGE_RISING>;++i2c-int-rising;++reset-n-io = <&gpio3 19 GPIO_ACTIVE_HIGH>;+};+};++-|+#include <dt-bindings/gpio/gpio.h>+#include <dt-bindings/interrupt-controller/irq.h>++spi {+#address-cells = <1>;+#size-cells = <0>;++nfc@0 {+compatible = "marvell,nfc-spi";+reg = <0>;++spi-max-frequency = <3000000>;+spi-cpha;+spi-cpol;++interrupt-parent = <&gpio1>;+interrupts = <17 IRQ_TYPE_EDGE_RISING>;++reset-n-io = <&gpio3 19 GPIO_ACTIVE_HIGH>;+};+};++-|+#include <dt-bindings/gpio/gpio.h>++uart {+nfc {+compatible = "marvell,nfc-uart";++reset-n-io = <&gpio3 16 GPIO_ACTIVE_HIGH>;++hci-muxed;+flow-control;+};+};
@@ -1,84 +0,0 @@-* Marvell International Ltd. NCI NFC Controller--Required properties:-- compatible: Should be:- - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices- - "marvell,nfc-i2c" for I2C devices- - "marvell,nfc-spi" for SPI devices--Optional SoC specific properties:-- pinctrl-names: Contains only one value - "default".-- pintctrl-0: Specifies the pin control groups used for this controller.-- reset-n-io: Output GPIO pin used to reset the chip (active low).-- hci-muxed: Specifies that the chip is muxing NCI over HCI frames.--Optional UART-based chip specific properties:-- flow-control: Specifies that the chip is using RTS/CTS.-- break-control: Specifies that the chip needs specific break management.--Optional I2C-based chip specific properties:-- i2c-int-falling: Specifies that the chip read event shall be trigged on- falling edge.-- i2c-int-rising: Specifies that the chip read event shall be trigged on- rising edge.--Example (for ARM-based BeagleBoard Black with 88W8887 on UART5):--&uart5 {-- nfcmrvluart: nfcmrvluart@5 {- compatible = "marvell,nfc-uart";-- reset-n-io = <&gpio3 16 0>;-- hci-muxed;- flow-control;- }-};---Example (for ARM-based BeagleBoard Black with 88W8887 on I2C1):--&i2c1 {- clock-frequency = <400000>;-- nfcmrvli2c0: i2c@1 {- compatible = "marvell,nfc-i2c";-- reg = <0x8>;-- /* I2C INT configuration */- interrupt-parent = <&gpio3>;- interrupts = <21 0>;-- /* I2C INT trigger configuration */- i2c-int-rising;-- /* Reset IO */- reset-n-io = <&gpio3 19 0>;- };-};---Example (for ARM-based BeagleBoard Black on SPI0):--&spi0 {-- mrvlnfcspi0: spi@0 {- compatible = "marvell,nfc-spi";-- reg = <0>;-- /* SPI Bus configuration */- spi-max-frequency = <3000000>;- spi-cpha;- spi-cpol;-- /* SPI INT configuration */- interrupt-parent = <&gpio1>;- interrupts = <17 0>;-- /* Reset IO */- reset-n-io = <&gpio3 19 0>;- };-};
From: Krzysztof Kozlowski <hidden> Date: 2021-10-10 14:23:56
Convert the ST ST21NFCA NFC controller to DT schema format. The
conversion also adds a new required property - interrupts - because it
was missing in the old bindings by mistake.
Signed-off-by: Krzysztof Kozlowski <redacted>
---
.../bindings/net/nfc/st,st21nfca.yaml | 68 +++++++++++++++++++
.../devicetree/bindings/net/nfc/st21nfca.txt | 37 ----------
2 files changed, 68 insertions(+), 37 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/nfc/st,st21nfca.yaml
delete mode 100644 Documentation/devicetree/bindings/net/nfc/st21nfca.txt
@@ -0,0 +1,68 @@+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause+%YAML1.2+---+$id:http://devicetree.org/schemas/net/nfc/st,st21nfca.yaml#+$schema:http://devicetree.org/meta-schemas/core.yaml#++title:STMicroelectronics SAS ST21NFCA NFC controller++maintainers:+-Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>++properties:+compatible:+const:st,st21nfca-i2c++clock-frequency:true++enable-gpios:+description:Output GPIO pin used for enabling/disabling the controller++ese-present:+type:boolean+description:|+Specifies that an ese is physically connected to the controller++interrupts:+maxItems:1++reg:+maxItems:1++uicc-present:+type:boolean+description:|+Specifies that the uicc swp signal can be physically connected to the+controller++required:+-compatible+-clock-frequency+-enable-gpios+-interrupts+-reg++additionalProperties:false++examples:+-|+#include <dt-bindings/gpio/gpio.h>+#include <dt-bindings/interrupt-controller/irq.h>++i2c {+#address-cells = <1>;+#size-cells = <0>;++nfc@1 {+compatible = "st,st21nfca-i2c";+reg = <0x1>;++clock-frequency = <400000>;+interrupt-parent = <&gpio5>;+interrupts = <2 IRQ_TYPE_LEVEL_LOW>;+enable-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;++ese-present;+uicc-present;+};+};
@@ -1,37 +0,0 @@-* STMicroelectronics SAS. ST21NFCA NFC Controller--Required properties:-- compatible: Should be "st,st21nfca-i2c".-- clock-frequency: I²C work frequency.-- reg: address on the bus-- enable-gpios: Output GPIO pin used for enabling/disabling the ST21NFCA--Optional SoC Specific Properties:-- pinctrl-names: Contains only one value - "default".-- pintctrl-0: Specifies the pin control groups used for this controller.-- ese-present: Specifies that an ese is physically connected to the nfc-controller.-- uicc-present: Specifies that the uicc swp signal can be physically-connected to the nfc controller.--Example (for ARM-based BeagleBoard xM with ST21NFCA on I2C2):--&i2c2 {--- st21nfca: st21nfca@1 {-- compatible = "st,st21nfca-i2c";-- reg = <0x01>;- clock-frequency = <400000>;-- interrupt-parent = <&gpio5>;- interrupts = <2 IRQ_TYPE_LEVEL_LOW>;-- enable-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;-- ese-present;- uicc-present;- };-};
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/1539010
nfc@28: 'clock-frequency' is a required property
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dt.yaml
nfc@28: compatible:0: 'nxp,nxp-nci-i2c' was expected
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dt.yaml
nfc@28: compatible: Additional items are not allowed ('nxp,nxp-nci-i2c' was unexpected)
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dt.yaml
nfc@28: compatible: ['nxp,pn547', 'nxp,nxp-nci-i2c'] is too long
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dt.yaml
nfc@30: 'clock-frequency' is a required property
arch/arm/boot/dts/ste-ux500-samsung-janice.dt.yaml
nfc@30: compatible:0: 'nxp,nxp-nci-i2c' was expected
arch/arm/boot/dts/ste-ux500-samsung-janice.dt.yaml
nfc@30: compatible: Additional items are not allowed ('nxp,nxp-nci-i2c' was unexpected)
arch/arm/boot/dts/ste-ux500-samsung-janice.dt.yaml
nfc@30: compatible: ['nxp,pn547', 'nxp,nxp-nci-i2c'] is too long
arch/arm/boot/dts/ste-ux500-samsung-janice.dt.yaml
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/1539014
nfc@0: 't5t-rmb-extra-byte-quirk', 'vin-voltage-override' do not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/imx6dl-prtrvt.dt.yaml
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/1539014
nfc@0: 't5t-rmb-extra-byte-quirk', 'vin-voltage-override' do not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/imx6dl-prtrvt.dt.yaml
I already sent a patch for this one.
Best regards,
Krzysztof
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/1539010
nfc@28: 'clock-frequency' is a required property
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dt.yaml
nfc@28: compatible:0: 'nxp,nxp-nci-i2c' was expected
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dt.yaml
nfc@28: compatible: Additional items are not allowed ('nxp,nxp-nci-i2c' was unexpected)
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dt.yaml
nfc@28: compatible: ['nxp,pn547', 'nxp,nxp-nci-i2c'] is too long
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dt.yaml
nfc@30: 'clock-frequency' is a required property
arch/arm/boot/dts/ste-ux500-samsung-janice.dt.yaml
nfc@30: compatible:0: 'nxp,nxp-nci-i2c' was expected
arch/arm/boot/dts/ste-ux500-samsung-janice.dt.yaml
nfc@30: compatible: Additional items are not allowed ('nxp,nxp-nci-i2c' was unexpected)
arch/arm/boot/dts/ste-ux500-samsung-janice.dt.yaml
nfc@30: compatible: ['nxp,pn547', 'nxp,nxp-nci-i2c'] is too long
arch/arm/boot/dts/ste-ux500-samsung-janice.dt.yaml
I missed that new compatible. I'll send a patch adding nxp,nxp-nci-i2c
and try to fix the DTS (missing clock-frequency).
Best regards,
Krzysztof
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/1539010
nfc@28: 'clock-frequency' is a required property
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dt.yaml
Hmm, this actually looks as mistake in bindings. First, clock-frequency
is a property of a I2C bus, not I2C child device. Second, it should not
be a required property anyway, as I2C will choose a default one matching
driver (e.g. standard speed of 100 kHz).
Except the trf7970a NFC driver, none of other NFC drivers parse the
clock-frequency.
Best regards,
Krzysztof