On 10/22/21 8:43 PM, Vladimir Oltean wrote:
Looking at the code, the GSWIP switch appears to hold bridging service
structures (VLANs, FDBs, forwarding rules) in PCE table entries.
Hardware access to the PCE table is non-atomic, and is comprised of
several register reads and writes.
The switch has multiple tables which can be accessed with indirect addressing over the PCE registers.
These accesses are currently serialized by the rtnl_lock, but DSA is
changing its driver API and that lock will no longer be held when
calling ->port_fdb_add() and ->port_fdb_del().
So this driver needs to serialize the access to the PCE table using its
own locking scheme. This patch adds that.
The driver also uses the gswip_pce_load_microcode() function to load a static configuration for the packet classification engine into a table using the same registers. It is currently not protected, but only called by the DSA setup callback.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
v3->v4: call mutex_init
drivers/net/dsa/lantiq_gswip.c | 28 +++++++++++++++++++++++-----
1 file changed, 23 insertions(+), 5 deletions(-)
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>