Re: [PATCH v1 1/2] driver core: fw_devlink: Add support for FWNODE_FLAG_BROKEN_PARENT
From: Vladimir Oltean <olteanv@gmail.com>
Date: 2021-09-30 13:44:13
Also in:
linux-acpi, lkml
Hi Saravana, On Wed, Sep 29, 2021 at 10:33:16PM -0700, Saravana Kannan wrote:
On Tue, Aug 31, 2021 at 4:18 PM Vladimir Oltean [off-list ref] wrote:quoted
On Wed, Sep 01, 2021 at 01:02:09AM +0200, Andrew Lunn wrote:quoted
Rev B is interesting because switch0 and switch1 got genphy, while switch2 got the correct Marvell PHY driver. switch2 PHYs don't have interrupt properties, so don't loop back to their parent device.This is interesting and not what I really expected to happen. It goes to show that we really need more time to understand all the subtleties of device dependencies before jumping on patching stuff. In case the DSA tree contains more than one switch, different things will happen in dsa_register_switch(). The tree itself is only initialized when the last switch calls dsa_register_switch(). All the other switches just mark themselves as present and exit probing early. See this piece of code in dsa_tree_setup: complete = dsa_tree_setup_routing_table(dst); if (!complete) return 0;Hi Vladimir, Can you point me to an example dts file that has a DSA tree with more than one switch and also point me to the switches that form the tree? I'm working on a RFC series that tries to improve some stuff and having an example DTS to look at would help. Thanks, Saravana
Andrew is testing with arch/arm/boot/dts/vf610-zii-dev-rev-b.dts.
Graphically it looks like this:
+-----------------------------+
| VF610 SoC |
| +--------+ |
| | fec1 | |
+----------+--------+---------+
| DSA master
|
| ethernet = <&fec1>;
+--------+----------+---------------------------+
| | port@6 | |
| +----------+ |
| | CPU port | dsa,member = <0 0>; |
| +----------+ -> tree 0, switch 0 |
| | cpu | |
| +----------+ |
| |
| switch0 |
| |
+-----------+-----------+-----------+-----------+
| port@0 | port@1 | port@2 | port@5 |
+-----------+-----------+-----------+-----------+
|switch0phy0|switch0phy1|switch0phy2| no PHY |
+-----------+-----------+-----------+-----------+
| user port | user port | user port | DSA port |
+-----------+-----------+-----------+-----------+
| lan0 | lan1 | lan2 | dsa |
+-----------+-----------+-----------+-----------+
| link = <&switch1port6 &switch2port9>;
|
|
|
| link = <&switch0port5>;
+----------+----------+-------------------------+
| | port@6 | |
| +----------+ |
| | DSA port | dsa,member = <0 1>; |
| +----------+ -> tree 0, switch 1 |
| | dsa | |
| +----------+ |
| |
| switch1 |
| |
+-----------+-----------+-----------+-----------+
| port@0 | port@1 | port@2 | port@5 |
+-----------+-----------+-----------+-----------+
|switch1phy0|switch1phy1|switch2phy2| no PHY |
+-----------+-----------+-----------+-----------+
| user port | user port | user port | DSA port |
+-----------+-----------+-----------+-----------+
| lan3 | lan4 | lan5 | dsa |
+-----------+-----------+-----------+-----------+
| link = <&switch2port9>;
|
|
|
| link = <&switch1port5 &switch0port5>;
+----------+----------+-------------------------------------+
| | port@9 | |
| +----------+ |
| | DSA port | dsa,member = <0 2>; |
| +----------+ -> tree 0, switch 2 |
| | dsa | |
| +----------+ |
| |
| switch2 |
| |
+-----------+-----------+-----------+-----------+-----------+
| port@0 | port@1 | port@2 | port@3 | port@4 |
+-----------+-----------+-----------+-----------+-----------+
|switch2phy0|switch2phy1|switch2phy2| no PHY | no PHY |
+-----------+-----------+-----------+-----------+-----------+
| user port | user port | user port | user port | user port |
+-----------+-----------+-----------+-----------+-----------+
| lan6 | lan7 | lan8 | optical3 | optical4 |
+-----------+-----------+-----------+-----------+-----------+