[PATCH net-next 2/2] stmmac: intel: Enable HW descriptor prefetch by default
From: <hidden>
Date: 2021-04-22 07:55:51
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Subsystem:
networking drivers, stmmac ethernet driver, the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Maxime Chevallier, Linus Torvalds
From: Mohammad Athari Bin Ismail <redacted> Enable HW descriptor prefetch by default by setting plat->dma_cfg->dche = true in intel_mgbe_common_data(). Need to be noted that this capability only be supported in DWMAC core version 5.20 onwards. In stmmac, there is a checking to check the core version. If the core version is below 5.20, this capability wouldn`t be configured. Below is the iperf result comparison between HW descriptor prefetch disabled(DCHE=0b) and enabled(DCHE=1b). Tested on Intel Elkhartlake platform with DWMAC Core 5.20. Observed line rate performance improvement with HW descriptor prefetch enabled. DCHE = 0b [ 5] local 169.254.1.162 port 42123 connected to 169.254.244.142 port 5201 [ ID] Interval Transfer Bitrate Total Datagrams [ 5] 0.00-1.00 sec 96.7 MBytes 811 Mbits/sec 70050 [ 5] 1.00-2.00 sec 96.5 MBytes 809 Mbits/sec 69850 [ 5] 2.00-3.00 sec 96.3 MBytes 808 Mbits/sec 69720 [ 5] 3.00-4.00 sec 95.9 MBytes 804 Mbits/sec 69450 [ 5] 4.00-5.00 sec 96.0 MBytes 806 Mbits/sec 69530 [ 5] 5.00-6.00 sec 96.8 MBytes 812 Mbits/sec 70080 [ 5] 6.00-7.00 sec 96.9 MBytes 813 Mbits/sec 70140 [ 5] 7.00-8.00 sec 96.8 MBytes 812 Mbits/sec 70080 [ 5] 8.00-9.00 sec 97.0 MBytes 814 Mbits/sec 70230 [ 5] 9.00-10.00 sec 96.9 MBytes 813 Mbits/sec 70170 - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bitrate Jitter Lost/Total Datagrams [ 5] 0.00-10.00 sec 966 MBytes 810 Mbits/sec 0.000 ms 0/699300 (0%) sender [ 5] 0.00-10.00 sec 966 MBytes 810 Mbits/sec 0.011 ms 0/699265 (0%) receiver DCHE = 1b [ 5] local 169.254.1.162 port 49740 connected to 169.254.244.142 port 5201 [ ID] Interval Transfer Bitrate Total Datagrams [ 5] 0.00-1.00 sec 97.9 MBytes 821 Mbits/sec 70880 [ 5] 1.00-2.00 sec 98.1 MBytes 823 Mbits/sec 71060 [ 5] 2.00-3.00 sec 98.2 MBytes 824 Mbits/sec 71140 [ 5] 3.00-4.00 sec 98.2 MBytes 824 Mbits/sec 71090 [ 5] 4.00-5.00 sec 98.1 MBytes 823 Mbits/sec 71050 [ 5] 5.00-6.00 sec 98.1 MBytes 823 Mbits/sec 71040 [ 5] 6.00-7.00 sec 98.1 MBytes 823 Mbits/sec 71050 [ 5] 7.00-8.00 sec 98.2 MBytes 824 Mbits/sec 71140 [ 5] 8.00-9.00 sec 98.2 MBytes 824 Mbits/sec 71120 [ 5] 9.00-10.00 sec 98.3 MBytes 824 Mbits/sec 71150 - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bitrate Jitter Lost/Total Datagrams [ 5] 0.00-10.00 sec 981 MBytes 823 Mbits/sec 0.000 ms 0/710720 (0%) sender [ 5] 0.00-10.00 sec 981 MBytes 823 Mbits/sec 0.041 ms 0/710650 (0%) receiver Signed-off-by: Mohammad Athari Bin Ismail <redacted> --- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
index 4bd038acb1b9..80728a4c0e3f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c@@ -471,6 +471,7 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, plat->dma_cfg->fixed_burst = 0; plat->dma_cfg->mixed_burst = 0; plat->dma_cfg->aal = 0; + plat->dma_cfg->dche = true; plat->axi = devm_kzalloc(&pdev->dev, sizeof(*plat->axi), GFP_KERNEL);
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2.17.1