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Chris Wyse

Embedded Software Development
(203) 888-7914 ext 203

Canoga Perkins
100 Bank St,
Seymour, CT 06483

On Mon, 2018-04-30 at 14:50 +0200, Andrew Lunn wrote:

On Fri, Apr 27, 2018 at 06:10:55PM +0000, Dave Richards wrote:

Hello,

I am building a prototype for a new product based on a Lanner, Inc.
embedded PC.  It is an Intel Celeron-based system with two host I210
GbE chips connected to 2 MV88E6172 chips (one NIC to one
switch).  Everything appears to show up hardware-wise.  My question
is, what is the next step?  How does DSA know which NICs are intended
to be masters?  Is this supposed to be auto-detected or is this
knowledge supposed to be communicated explicitly.  Reading through
the DSA driver code I see that there is a check of the OF property
list for the device for a "label"/"cpu" property/value pair that
needs to be present.  Who sets this and when?

Hi Dave

Since you are on Intel, you don't have simple access to Device
tree. So you need to use platform data instead. Or possibly start
hacking on ACPI support for DSA. For the moment, i would suggest
platform data.

I'm also working on a similar setup, intel CPU connected to an
MV88E6532. I have some work in progress code i can share with you,
which i want to submit for inclusion to mainline in the next few
weeks.  This adds platform data support to the mv88e6xxx driver, and
will give you an idea how you link the MAC to the switch.

What MDIO bus do you connect the switches to? The i210 MDIO bus? If
so, this is going to cause you a problem. The igb driver ignores the
Linux MDIO and PHY code, and does it all itself. DSA assumes the
switch can be accessed using Linux standard MDIO interfaces. So you
have going to have to hack on the igb driver to make it use standard
MDIO.

Andrew

I have a board that uses the Intel i210, and I'd like it be the DSA
master.  I'm looking for suggestions on how to proceed.

My configuration is an Intel E3950 CPU running Linux 4.19.62, using
UEFI/ACPI.  The board has a Xilinx FPGA that supports SFP & QSFP
devices.  The SFP ports use the standard SFP driver & phylink.  The
QSFP ports use a modified version of the SFP driver.  It also includes
an interface to an Intel i210 ethernet.

We use device tree overlays to load the information for the devices
supported by the FPGA, then load an MFD FPGA driver that instantiates
platform drivers for each of those devices.  One of the drivers that
gets loaded is a DSA driver that has the SFP & QSFP devices as its
slaves.  The intent is to use the Intel i210 on the master port of the
DSA driver.

At first glance, I believe I need to complete these tasks:
  1.  Create a device tree node for the i210, providing information on
the already loaded driver, that can be used by the DSA driver.
  2.  Obtain or update a i210 driver that will work with DSA

I'm open to any suggestions on how to proceed.  We're relatively time
limited - so I'm hoping to find a quick solution, even if we only use
it for the short-term.

Regarding the i210 driver, I looked through the latest version of the
driver.  I didn't see any commits from you for the igb driver
changes.  Did they ever get mainlined?  If not, would you please give
me access to your modified version of the driver source?

Thanks.

Chris Wyse

________________________________

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20600 Prairie Street
Chatsworth, CA 91311
(818) 718-6300

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