RE: [PATCH v10 01/20] dlb: add skeleton for DLB driver

-----Original Message-----
From: Mike Ximing Chen <redacted>
Sent: Wednesday, February 10, 2021 12:54 PM
To: netdev@vger.kernel.org
Cc: davem@davemloft.net; kuba@kernel.org; arnd@arndb.de;
gregkh@linuxfoundation.org; Williams, Dan J [off-list ref]; pierre-
louis.bossart@linux.intel.com; Gage Eads [off-list ref]
Subject: [PATCH v10 01/20] dlb: add skeleton for DLB driver

diff --git a/Documentation/misc-devices/dlb.rst b/Documentation/misc-

devices/dlb.rst
new file mode 100644
index 000000000000..aa79be07ee49

--- /dev/null
+++ b/Documentation/misc-devices/dlb.rst

@@ -0,0 +1,259 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+===========================================
+Intel(R) Dynamic Load Balancer Overview
+===========================================
+
+:Authors: Gage Eads and Mike Ximing Chen
+
+Contents
+========
+
+- Introduction
+- Scheduling
+- Queue Entry
+- Port
+- Queue
+- Credits
+- Scheduling Domain
+- Interrupts
+- Power Management
+- User Interface
+- Reset
+
+Introduction
+============
+
+The Intel(r) Dynamic Load Balancer (Intel(r) DLB) is a PCIe device that
+provides load-balanced, prioritized scheduling of core-to-core communication.
+
+Intel DLB is an accelerator for the event-driven programming model of
+DPDK's Event Device Library[2]. The library is used in packet processing
+pipelines that arrange for multi-core scalability, dynamic load-balancing, and
+variety of packet distribution and synchronization schemes.
+
+Intel DLB device consists of queues and arbiters that connect producer
+cores and consumer cores. The device implements load-balanced queueing

features
+including:
+- Lock-free multi-producer/multi-consumer operation.
+- Multiple priority levels for varying traffic types.
+- 'Direct' traffic (i.e. multi-producer/single-consumer)
+- Simple unordered load-balanced distribution.
+- Atomic lock free load balancing across multiple consumers.
+- Queue element reordering feature allowing ordered load-balanced distribution.
+