Thread (18 messages) 18 messages, 2 authors, 2021-02-07

Re: [PATCH v8 net-next 02/15] dts: marvell: add CM3 SRAM memory to cp11x ethernet device tree

From: Jakub Kicinski <kuba@kernel.org>
Date: 2021-02-06 23:41:04
Also in: lkml

On Sat, 6 Feb 2021 18:45:48 +0200 stefanc@marvell.com wrote:
From: Konstantin Porotchkin <redacted>

CM3 SRAM address space would be used for Flow Control configuration.

Signed-off-by: Stefan Chulski <redacted>
Signed-off-by: Konstantin Porotchkin <redacted>
Isn't there are requirement to CC the DT mailing list and Rob on all
device tree patches?  Maybe someone can clarify I know it's required
when adding bindings.. 
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