Thread (13 messages) 13 messages, 6 authors, 2021-01-18

Re: Registering IRQ for MT7530 internal PHYs

From: DENG Qingfang <dqfext@gmail.com>
Date: 2020-12-30 09:08:31
Also in: lkml

Hi Heiner,
Thanks for your reply.

On Wed, Dec 30, 2020 at 3:39 PM Heiner Kallweit [off-list ref] wrote:
I don't think that's the best option.
I'm well aware of that.
You may want to add a PHY driver for your chip. Supposedly it
supports at least PHY suspend/resume. You can use the RTL8366RB
PHY driver as template.
There's no MediaTek PHY driver yet. Do we really need a new one just
for the interrupts?
quoted
+     dev_info_ratelimited(priv->dev, "interrupt status: 0x%08x\n", val);
+     dev_info_ratelimited(priv->dev, "interrupt enable: 0x%08x\n", mt7530_read(priv, MT7530_SYS_INT_EN));
+
This is debug code to be removed in the final version?
Yes.
quoted
+     for (phy = 0; phy < MT7530_NUM_PHYS; phy++) {
+             if (val & BIT(phy)) {
+                     unsigned int child_irq;
+
+                     child_irq = irq_find_mapping(priv->irq_domain, phy);
+                     handle_nested_irq(child_irq);
+                     handled = true;
+             }
+     }
+
+     return handled ? IRQ_HANDLED : IRQ_NONE;
IRQ_RETVAL() could be used here.
Good to know :)
quoted
+}
+
+static void mt7530_irq_mask(struct irq_data *d)
+{
+     struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);
+
+     priv->irq_enable &= ~BIT(d->hwirq);
Here you don't actually do something. HW doesn't support masking
interrupt generation for a port?
priv->irq_enable will be written to MT7530_SYS_INT_EN in
mt7530_irq_bus_sync_unlock. You can think of it as an inverted mask.
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