[PATCH v5 4/5] ARM: dts: exynos: Add Ethernet to Artik 5 board
flat view
STALE2167d
LANDED
From: Łukasz Stelmach <l.stelmach@samsung.com>
Date: 2020-11-03 15:18:38
Also in:
linux-arm-kernel, linux-devicetree, linux-samsung-soc, lkml
Subsystem:
the rest · Maintainer:
Linus Torvalds
Revision v5 of 5 in this series; landed in mainline as 2024b130b0c8 on 2020-11-06.
Revisions (5)
Add node for ax88796c ethernet chip. Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com> --- arch/arm/boot/dts/exynos3250-artik5-eval.dts | 29 ++++++++++++++++++++ 1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250-artik5-eval.dts b/arch/arm/boot/dts/exynos3250-artik5-eval.dts
index 20446a846a98..a91e09a7d3fa 100644
--- a/arch/arm/boot/dts/exynos3250-artik5-eval.dts
+++ b/arch/arm/boot/dts/exynos3250-artik5-eval.dts@@ -37,3 +37,32 @@ &mshc_2 { &serial_2 { status = "okay"; }; + +&spi_0 { + status = "okay"; + cs-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>, <0>; + + assigned-clocks = <&cmu CLK_MOUT_MPLL>, <&cmu CLK_DIV_MPLL_PRE>, + <&cmu CLK_MOUT_SPI0>, <&cmu CLK_DIV_SPI0>, + <&cmu CLK_DIV_SPI0_PRE>, <&cmu CLK_SCLK_SPI0>; + assigned-clock-parents = + <&cmu CLK_FOUT_MPLL>, /* for: CLK_MOUT_MPLL */ + <&cmu CLK_MOUT_MPLL>, /* for: CLK_DIV_MPLL_PRE */ + <&cmu CLK_DIV_MPLL_PRE>, /* for: CLK_MOUT_SPI0 */ + <&cmu CLK_MOUT_SPI0>, /* for: CLK_DIV_SPI0 */ + <&cmu CLK_DIV_SPI0>, /* for: CLK_DIV_SPI0_PRE */ + <&cmu CLK_DIV_SPI0_PRE>; /* for: CLK_SCLK_SPI0 */ + + ethernet@0 { + compatible = "asix,ax88796c"; + reg = <0x0>; + local-mac-address = [00 00 00 00 00 00]; /* Filled in by a boot-loader */ + interrupt-parent = <&gpx2>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <40000000>; + reset-gpios = <&gpe0 2 GPIO_ACTIVE_LOW>; + controller-data { + samsung,spi-feedback-delay = <2>; + }; + }; +};
--
2.26.2