On Mon, 6 Jan 2020 at 00:56, David Miller [off-list ref] wrote:

From: Vladimir Oltean <olteanv@gmail.com>
Date: Fri,  3 Jan 2020 22:01:18 +0200

quoted

Unlike most other conversions, this one is not by far a trivial one, and should
be seen as "Layerscape PCS meets PHYLINK". Actually, the PCS doesn't
need a lot of hand-holding and most of our other devices 'just work'
(this one included) without any sort of operating system awareness, just
an initialization procedure done typically in the bootloader.
Our issues start when the PCS stops from "just working", and that is
where PHYLINK comes in handy.

The PCS is not specific to the Vitesse / Microsemi / Microchip switching core
at all. Variations of this SerDes/PCS design can also be found on DPAA1 and
DPAA2 hardware.

The main idea of the abstraction provided is that the PCS looks so much like a
PHY device, that we model it as an actual PHY device and run the generic PHY
functions on it, where appropriate.

 ...

Series applied, please address any follow-up feedback you receive.

Thank you.

Thanks David, sure, ready for action.

-Vladimir