-----Original Message-----
From: Andrew Lunn <andrew@lunn.ch>
Sent: Thursday, November 28, 2019 12:21 AM
To: Nicolas.Ferre@microchip.com
Cc: Milind Parab <redacted>; antoine.tenart@bootlin.com;
davem@davemloft.net; netdev@vger.kernel.org; f.fainelli@gmail.com;
hkallweit1@gmail.com; linux-kernel@vger.kernel.org; Dhananjay Vilasrao
Kangude [off-list ref]; Parshuram Raju Thombare
[off-list ref]; rmk+kernel@arm.linux.org.uk
Subject: Re: [PATCH 2/3] net: macb: add support for C45 MDIO read/write

EXTERNAL MAIL


On Wed, Nov 27, 2019 at 06:31:54PM +0000, Nicolas.Ferre@microchip.com
wrote:

quoted

On 26/11/2019 at 15:37, Andrew Lunn wrote:

quoted

On Tue, Nov 26, 2019 at 09:09:49AM +0000, Milind Parab wrote:

quoted

This patch modify MDIO read/write functions to support
communication with C45 PHY.

I think i've asked this before, at least once, but you have not
added it to the commit messages. Do all generations of the macb support

C45?

quoted

For what I can tell from the different IP revisions that we
implemented throughout the years in Atmel then Microchip products
(back to
at91rm9200 and at91sam9263), it seems yes.

The "PHY Maintenance Register" "MACB_MAN_*" was always present with
the same bits 32-28 layout (with somehow different names).

But definitively we would need to hear that from Cadence itself which
would be far better.

Hi Nicolas

Thanks, that is useful.

I'm just trying to avoid backward compatibility issues, somebody issues a C45
request on old silicon and it all goes horribly wrong.

This patch doesn't affect current C22 operation of the driver. 
However if a user selects C45 on incompatible MAC (there are old MAC, prior to Release1p10, released 10th April 2003) MDIO operations may fails.
Adding check will cover this corner case.

We will add this check in v2 of patch set.

      Andrew