[RFC PATCH net-next 2/3] mlxsw: reg: Add Port Diagnostics Database Register
From: Petr Machata <hidden>
Date: 2019-03-15 17:56:41
Subsystem:
mellanox ethernet switch drivers, networking drivers, the rest · Maintainers:
Ido Schimmel, Petr Machata, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
The PDDR register enables to read the Phy debug database. Signed-off-by: Petr Machata <redacted> --- drivers/net/ethernet/mellanox/mlxsw/reg.h | 54 +++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index eb4c5e8964cd..fd85d5bd982c 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h@@ -5210,6 +5210,59 @@ static inline void mlxsw_reg_pspa_pack(char *payload, u8 swid, u8 local_port) mlxsw_reg_pspa_sub_port_set(payload, 0); } +/* PDDR - Port Diagnostics Database Register Layout + * ------------------------------------------------ + * This register enables to read the Phy debug database. + */ +#define MLXSW_REG_PDDR_ID 0x5031 +#define MLXSW_REG_PDDR_LEN 0x100 + +MLXSW_REG_DEFINE(pddr, MLXSW_REG_PDDR_ID, MLXSW_REG_PDDR_LEN); + +/* reg_pddr_local_port + * Local port number. + * Access: Index + */ +MLXSW_ITEM32(reg, pddr, local_port, 0x00, 16, 8); + +enum { + MLXSW_REG_PDDR_PAGESEL_TROUBLESHOOTING_INFO = 1, +}; + +/* reg_pddr_page_select + * Page select index. + * Access: Index + */ +MLXSW_ITEM32(reg, pddr, page_select, 0x04, 0, 8); + +/* Troubleshooting Info Page + * - - - - - - - - - - - - - + */ + +enum { + MLXSW_REG_PDDR_TRBLSH_GROUP_MONITOR = 0, +}; + +/* reg_pddr_group_opcode + * Group selector. + * Access: Index + */ +MLXSW_ITEM32(reg, pddr, trblsh_group_opcode, 0x08, 0, 16); + +/* reg_pddr_status_opcode + * Group selector. + * Access: RO + */ +MLXSW_ITEM32(reg, pddr, trblsh_status_opcode, 0x0C, 0, 16); + +static inline void mlxsw_reg_pddr_pack(char *payload, u8 local_port, + u8 page_select) +{ + MLXSW_REG_ZERO(pddr, payload); + mlxsw_reg_pddr_local_port_set(payload, local_port); + mlxsw_reg_pddr_page_select_set(payload, page_select); +} + /* HTGT - Host Trap Group Table * ---------------------------- * Configures the properties for forwarding to CPU.
@@ -9927,6 +9980,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = { MLXSW_REG(pptb), MLXSW_REG(pbmc), MLXSW_REG(pspa), + MLXSW_REG(pddr), MLXSW_REG(htgt), MLXSW_REG(hpkt), MLXSW_REG(rgcr),
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2.4.11