Re: CRC errors between mvneta and macb

On Mon, Oct 22, 2018 at 05:15:21PM +0200, Richard Genoud wrote:

After analyzing the ethernet frame on the Davicom PHY's output (pin
TX+), I find out that the FCS errors occurs when the ethernet preamble
is longer than 56bits. (something like 58 or 60 bits)

To say this in another way, instead of having 28 times 1-0 followed by
the SFD (10101011), I see 29 or 30 times 1-0 followed by the SFD.
(sometimes 29, sometimes 30)


Should a longer preamble be considered as an FCS error ? It seems a
little harsh since the point of the preamble is to synchronize the frame.

That indeed seems a bit strange considering that you're not supposed to
know what is before the preamble so it would very well contain random
noise looking a lot like alteranted bits.

I don't know what the 802.3 standard says about that.

Just found it :-)

     https://www.trincoll.edu/Academics/MajorsAndMinors/Engineering/Documents/IEEE%20Standard%20for%20Ethernet.pdf

Page 132, #7.2.3.2 :

    The DTE is required to supply at least 56 bits of preamble in
    order to satisfy system requirements. System components consume
    preamble bits in order to perform their functions. The number
    of preamble bits sourced ensures an adequate number of bits are
    provided to each system component to correctly implement its
    function.

So that totally makes sense since the purpose is to enable signal
detection at the hardware leve, hence the problem definitely is on
the receiver in your case.

Willy