Re: [PATCH v3 net-next] ravb: do not write 1 to reserved bits
From: Sergei Shtylyov <hidden>
Date: 2018-09-18 22:28:22
Also in:
linux-renesas-soc
On 09/18/2018 01:22 PM, Simon Horman wrote:
From: Kazuya Mizuguchi <redacted> EtherAVB hardware requires 0 to be written to status register bits in order to clear them, however, care must be taken not to: 1. Clear other bits, by writing zero to them 2. Write one to reserved bits This patch corrects the ravb driver with respect to the second point above. This is done by defining reserved bit masks for the affected registers and, after auditing the code, ensure all sites that may write a one to a reserved bit use are suitably masked. Signed-off-by: Kazuya Mizuguchi <redacted> Signed-off-by: Simon Horman <redacted>
[...] Reviewed-by: Sergei Shtylyov <redacted>
quoted hunk ↗ jump to hunk
diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index 1470fc12282b..9b6bf557a2f5 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h@@ -428,6 +428,7 @@ enum EIS_BIT { EIS_CULF1 = 0x00000080, EIS_TFFF = 0x00000100, EIS_QFS = 0x00010000, + EIS_RESERVED = (GENMASK(31, 17) | GENMASK(15, 11)),
Well, I'm not a big fan of BIT() and GENMASK() -- they still lack a macro to #define a bit/field value. But if you prefer to use them, OK, let's be so... [...] MBR, Sergei