Thread (19 messages) flat view 19 messages, 4 authors, 2018-03-27

Aw: Re: [PATCH v7 0/7] netdev: intel: Eliminate duplicate barriers on weakly-ordered archs

From: "Lino Sanfilippo" <LinoSanfilippo@gmx.de>
Date: 2018-03-27 14:33:00
Also in: intel-wired-lan, linux-arm-kernel, linux-arm-msm

On 3/27/2018 10:04 AM, Lino Sanfilippo wrote:
quoted
Hi,
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Double sorry now.

I don't know if you have been following "RFC on writel and writel_relaxed" thread
or not but there are some new developments about wmb() requirement. 
Just out of interest: Where can this thread be found?
https://www.spinics.net/lists/linux-rdma/msg62570.html

https://patchwork.kernel.org/patch/10309913/

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Basically, wmb() should never be used before writel() as writel() seem to
provide coherency and observability guarantee.
AFAIU memory-barriers.txt writel() only guarantees correct order of accesses to
IO-memory not RAM vs. IO-memory (this may be the case for some architectures 
where the writel() implementation contains a wmb() but not for all).
For the RAM vs. IO-memory case at least a a wmb()/rmb() has to be used. 
Is this not correct? 
We are being told that if you use writel(), then you don't need a wmb() on
all architectures.

Jason is seeking behavior clarification for write combined buffers.
Interesting, thanks for the information!

Lino
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