Re: net: ti: cpsw-phy-sel: RGMII is not working on AM335x

Hello Andrew,

Am Mittwoch, den 11.01.2017, 16:14 +0100 schrieb Andrew Lunn:

quoted

So I wonder what is correct now? As for me the patch makes RGMII
unusable.
Has anyone an explanation?

Hi Teresa

In your device tree, what phy-mode do you have?

And does your hardware require an RGMII delay in order that it works?

my device tree node for the RGMII looks like this:

&cpsw_emac1 {
        phy-handle = <&phy1>;
        phy-mode = "rgmii";
        dual_emac_res_vlan = <2>;
        status = "okay";
};

&davinci_mdio {
        phy1: ethernet-phy@1 {
                reg = <2>;

                /* Register 260 (104h) – RGMII Clock and Control Pad Skew */                rxc-skew-ps = <1400>;
                rxdv-skew-ps = <0>;
                txc-skew-ps = <1400>;
                txen-skew-ps = <0>;
                /* Register 261 (105h) – RGMII RX Data Pad Skew */
                rxd3-skew-ps = <0>;
                rxd2-skew-ps = <0>;
                rxd1-skew-ps = <0>;
                rxd0-skew-ps = <0>;
                /* Register 262 (106h) – RGMII TX Data Pad Skew */
                txd3-skew-ps = <0>;
                txd2-skew-ps = <0>;
                txd1-skew-ps = <0>;
                txd0-skew-ps = <0>;
        };
};

The phy we use is a KSZ9021. And yes we add delays to the
phy, as you can see. When looking to the dts documentation I probably
need to set the phy-mode to "rgmii-id" instead, as the phy is providing
the delays.
I make a quick test with that change and it is working. So this seems
to solve my problem. Thank you for the hint.

Regards,
Teresa

    Andrew