Hi,
On 18.12.2016 19:30, Pavel Machek wrote:
Hi!
quoted
quoted
- e1efa87241272104d6a12c8b9fcdc4f62634d447
Yep, a sync of the dma descriptors before the hardware gets ownership of the tx tail
idx is missing in the stmmac, too.
I can reproduce failure with 4.4 fairly easily. I tried with dma_
variant of barriers, and it failed, too
[ 1018.410012] stmmac: early irq
[ 1023.939702] fpga_cmd_read:wait_event timed out!
[ 1033.128692] ------------[ cut here ]------------
[ 1033.133329] WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:303
dev_watchdog+0x264/0x284()
[ 1033.141748] NETDEV WATCHDOG: eth0 (socfpga-dwmac): transmit queue 0
timed out
[ 1033.148861] Modules linked in:
This watchdog warning clearly says that for some reason the tx queue was stopped
but never woken up in a certain timespan (5 sec in our case, which is a lot).
Does this occur after the queue has been stopped and woken up again a few times or
is it already the first time the queue is stopped (and never woken up)?
Regards,
Lino