Florian Fainelli [off-list ref] writes:
On 11/04/2016 08:36 AM, Sebastian Frias wrote:
quoted
Hi Måns,
On 11/04/2016 04:18 PM, Måns Rullgård wrote:
quoted
Sebastian Frias [off-list ref] writes:
quoted
The delay can be applied at PHY or MAC level, but since
PHY drivers will apply the delay at PHY level when using
one of the "internal delay" declinations of RGMII mode
(like PHY_INTERFACE_MODE_RGMII_TXID), applying it again
at MAC level causes issues.
The Broadcom GENET driver does the same thing.
Well, I don't know who uses that driver, or why they did it that way.
I do use this driver and it works for me (tm), although I tested mostly
with Broadcom PHYs and Ethernet switches, rarely with third party PHYs,
but had that too, but all of that is in tree though,
drivers/net/phy/broadcom.com, drivers/net/dsa/b53/ so feel free to
"audit" that part of the code too.
The configuration of the GENET port multiplexer requires us to specify
how we want to align the clock and data, if we don't do that, and the
PHY is also not agreeing with how its own delays should be configured,
mayhem ensues, ranging from occasional transmit success, to high rates
of CRC/FCS errors in best cases.
I did verify that the settings were correct using a scope FWIW.
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However, with the current code and DT bindings, if one requires
the delay, phy-connection-type="rgmii-txid" must be set.
Yes, and we would set it correctly for our Broadcom reference boards
using this driver.
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But when doing so, both the Atheros 8035 and the Aurora NB8800 drivers
will apply the delay.
I think a better way of dealing with this is that both, PHY and MAC
drivers exchange information so that the delay is applied only once.
Exchange what information? The PHY device interface (phydev->interface)
conveys the needed information for both entities.
There doesn't seem to be any consensus among the drivers regarding where
the delay should be applied. Since only a few drivers, MAC or PHY, act
on this property, most combinations still work by chance. It is common
for boards to set the delay at the PHY using external config pins so no
software setup is required (although I have one Sigma based board that
gets this wrong). I suspect if drivers/net/ethernet/broadcom/genet were
used with one of the four PHY drivers that also set the delay based on
this DT property, things would go wrong.
--
Måns Rullgård