Re: [PATCH net-next 1/2] net: fsl: Allow most drivers to be built with COMPILE_TEST

Hi Florian,

[auto build test WARNING on net-next/master]

url:    https://github.com/0day-ci/linux/commits/Florian-Fainelli/net-ethernet-Allow-Marvell-Freescale-to-COMPILE_TEST/20161116-024633
config: i386-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All warnings (new ones prefixed by >>):

quoted

drivers/net/ethernet/freescale/gianfar_ptp.c:75:0: warning: "FS" redefined

    #define FS                    (1<<28) /* FIPER start indication */
    
   In file included from arch/x86/include/uapi/asm/ptrace.h:5:0,
                    from arch/x86/include/asm/ptrace.h:6,
                    from arch/x86/include/asm/math_emu.h:4,
                    from arch/x86/include/asm/processor.h:11,
                    from include/linux/mutex.h:19,
                    from include/linux/kernfs.h:13,
                    from include/linux/sysfs.h:15,
                    from include/linux/kobject.h:21,
                    from include/linux/device.h:17,
                    from drivers/net/ethernet/freescale/gianfar_ptp.c:23:
   arch/x86/include/uapi/asm/ptrace-abi.h:15:0: note: this is the location of the previous definition
    #define FS 9
    

vim +/FS +75 drivers/net/ethernet/freescale/gianfar_ptp.c

c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  59  	u32 tmr_alarm2_h; /* Timer alarm 2 high register */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  60  	u32 tmr_alarm2_l; /* Timer alarm 2 high register */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  61  	u8  res3[48];
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  62  	u32 tmr_fiper1;   /* Timer fixed period interval */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  63  	u32 tmr_fiper2;   /* Timer fixed period interval */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  64  	u32 tmr_fiper3;   /* Timer fixed period interval */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  65  	u8  res4[20];
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  66  	u32 tmr_etts1_h;  /* Timestamp of general purpose external trigger */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  67  	u32 tmr_etts1_l;  /* Timestamp of general purpose external trigger */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  68  	u32 tmr_etts2_h;  /* Timestamp of general purpose external trigger */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  69  	u32 tmr_etts2_l;  /* Timestamp of general purpose external trigger */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  70  };
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  71  
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  72  /* Bit definitions for the TMR_CTRL register */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  73  #define ALM1P                 (1<<31) /* Alarm1 output polarity */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  74  #define ALM2P                 (1<<30) /* Alarm2 output polarity */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22 @75  #define FS                    (1<<28) /* FIPER start indication */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  76  #define PP1L                  (1<<27) /* Fiper1 pulse loopback mode enabled. */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  77  #define PP2L                  (1<<26) /* Fiper2 pulse loopback mode enabled. */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  78  #define TCLK_PERIOD_SHIFT     (16) /* 1588 timer reference clock period. */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  79  #define TCLK_PERIOD_MASK      (0x3ff)
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  80  #define RTPE                  (1<<15) /* Record Tx Timestamp to PAL Enable. */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  81  #define FRD                   (1<<14) /* FIPER Realignment Disable */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  82  #define ESFDP                 (1<<11) /* External Tx/Rx SFD Polarity. */
c78275f3 drivers/net/gianfar_ptp.c Richard Cochran 2011-04-22  83  #define ESFDE                 (1<<10) /* External Tx/Rx SFD Enable. */

:::::: The code at line 75 was first introduced by commit
:::::: c78275f366c687b5b3ead3d99fc96d1f02d38a8e ptp: Added a clock that uses the eTSEC found on the MPC85xx.

:::::: TO: Richard Cochran [off-list ref]
:::::: CC: John Stultz [off-list ref]

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