Re: [PATCH v4 net-next v4 14/14] net: dsa: mv88e6xxx: abstract switch registers accesses

Hi Andrew, David,

Andrew Lunn [off-list ref] writes:

On Mon, Jun 20, 2016 at 12:03:37PM -0400, Vivien Didelot wrote:

quoted

When the SMI address of the switch chip is zero, the chip assumes to be
the only one on the SMI master bus and thus responds to all its known
SMI devices addresses (port registers, Global2, etc.)

When its SMI address is not zero, some chips (e.g. 88E6352) use an
indirect access through two SMI Command and Data registers.

Other models (e.g. 88E6060) using less than 16 internal SMI addresses
always use a direct access.

Add a capability flag to describe chips supporting the (indirect)
Multi-chip Addressing Mode, and a low-level API to access the registers
via SMI.

Other accesses (like Ethernet management frames) may be added later.

Signed-off-by: Vivien Didelot <redacted>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

This series is now ready for merging.

I introduced a warning in that patch by mistake, by printing 'val'
instead of '*val' in a dev_dbg() call...

I respin a v5 with Andrew's tag and the debug printing fixed.

Sorry for the noice...

      Vivien