Thread (2 messages) flat view 2 messages, 2 authors, 2014-06-18

RE: MIPS: Add MSI support for XLP9XX

From: David Laight <hidden>
Date: 2014-06-18 09:01:29
Also in: lkml

From: Dave Jones
On Tue, Jun 10, 2014 at 01:31:04AM +0000, Linux Kernel wrote:
 > Gitweb:     http://git.kernel.org/linus/;a=commit;h=d66f3f0e10b49df8d0cc0d8eb5bf2ef9863a33cf
 > Commit:     d66f3f0e10b49df8d0cc0d8eb5bf2ef9863a33cf
 > Parent:     1c98398662c9b4e2f03f64344f83dd6cb14e0420
 > Refname:    refs/heads/master
 > Author:     Ganesan Ramalingam [off-list ref]
 > AuthorDate: Fri May 9 16:35:49 2014 +0530
 > Committer:  Ralf Baechle [off-list ref]
 > CommitDate: Fri May 30 16:51:02 2014 +0200
 >
 >     MIPS: Add MSI support for XLP9XX

...

 > +		if (cpu_is_xlp9xx()) {
 > +			val = ((node * nlm_threads_per_node()) << 7 |
 > +				PIC_PCIE_MSIX_IRQ(link) << 1 | 0 << 0);

Should this be..

			val = ((node * nlm_threads_per_node()) << 7 |
				PIC_PCIE_MSIX_IRQ(link) << 1);
			val &= ~(1 << 0);

perhaps ? because shifting a zero is a nop, as is ORing it.
Unlikely, it looks to me as though it is just being explicit that the
low bit of the compound word (whatever it is) is zero.

	David
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