2014-03-24 10:23 GMT-07:00 Arnd Bergmann [off-list ref]:
On Monday 24 March 2014 09:32:17 Florian Fainelli wrote:
quoted
quoted
+ priv->tx_skb[tx_head] = skb;
+ priv->tx_phys[tx_head] = phys;
+ desc->send_addr = cpu_to_be32(phys);
+ desc->send_size = cpu_to_be16(skb->len);
+ desc->cfg = cpu_to_be32(DESC_DEF_CFG);
+ phys = priv->tx_desc_dma + tx_head * sizeof(struct tx_desc);
+ desc->wb_addr = cpu_to_be32(phys);
Don't we need a barrier here to ensure that all stores are completed
before we hand this descriptor address to hip40_set_xmit_desc() which
should make DMA start processing it?
I would think the writel() in set_xmit_desc() implies the barrier.
Right, which means that this should be properly documented to make
sure that this simplification is well understood and produces the
expected result.
--
Florian