Thread (7 messages) flat view 7 messages, 3 authors, 2013-08-01

Re: [PATCH v2] net/phy: micrel: Add OF configuration support

From: Sascha Hauer <s.hauer@pengutronix.de>
Date: 2013-08-01 08:47:39
Also in: linux-devicetree

On Thu, Aug 01, 2013 at 06:53:54AM +0000, Sean Cross wrote:
quoted hunk ↗ jump to hunk
Some boards require custom PHY configuration, for example due to trace
length differences.  Add the ability to configure these registers in
order to get the PHY to function on boards that need it.

Because PHYs are auto-detected based on MDIO device IDs, allow PHY
configuration to be specified in the parent Ethernet device node if no
PHY device node is present.

Signed-off-by: Sean Cross <redacted>
---
 .../devicetree/bindings/net/micrel-phy.txt         |   20 ++++++++
 drivers/net/phy/micrel.c                           |   50 ++++++++++++++++++++
 2 files changed, 70 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/micrel-phy.txt
diff --git a/Documentation/devicetree/bindings/net/micrel-phy.txt b/Documentation/devicetree/bindings/net/micrel-phy.txt
new file mode 100644
index 0000000..97c1ef2
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/micrel-phy.txt
@@ -0,0 +1,20 @@
+Micrel KS8737, KSZ8041, KSZ8001, KS8721, KSZ8081, KSZ8091, KSZ8061, KSZ9021,
+KSZ9031, Ethernet PHYs, and KSZ8873MLL and KSZ886X Ethernet switches.
+
+Some boards require special tuning values, particularly when it comes to
+clock delays.  You can specify clock delay values by adding
+micrel-specific properties to an Ethernet OF device node.
+
+Optional properties:
+- micrel,clk-control-pad-skew : Timing offset for the MII clock line
+- micrel,rx-data-pad-skew : Timing offset for the RX MII pad
+- micrel,tx-data-pad-skew : Timing offset for the TX MII pad
+
+Example:
+	&enet {
+		micrel,clk-control-pad-skew = <0xf0f0>;
+		micrel,rx-data-pad-skew = <0x0000>;
+		micrel,tx-data-pad-skew = <0xffff>;
+		status = "okay";
+	};
Given that this patch adds a devicetree binding which I think we now
agree that this introduces an ABI I think this needs more thought. Some
questions:

- Does binding this also work for MII controllers external to the MAC?
  Several Marvell SoCs have this situation. MDIO is a bus. With the
  binding above you assume that all devices on the bus use the same
  settings
- You directly put the register contents into dt. This assumes that all
  micrel phys have a compatible register layout. This may be the case
  now, but what's with future phys?
- The pad skew settings are needed for other phys aswell. It might be
  worth introducing a binding which could work for say Artheros phys
  aswell.

Sascha

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