Thread (22 messages) 22 messages, 6 authors, 2013-06-04

Re: [PATCH] net/macb: fix ISR clear-on-write behavior only for some SoC

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From: Steffen Trumtrar <hidden>
Date: 2013-05-14 07:02:05
Also in: linux-arm-kernel, lkml

Hi!

On Mon, May 13, 2013 at 06:05:05PM +0200, Nicolas Ferre wrote:
Commit 749a2b6 (net/macb: clear tx/rx completion flags in ISR)
introduces clear-on-write on ISR register. This behavior is not always
implemented when using Cadence MACB/GEM and is breaking other platforms.
We are using a new Device Tree compatibility string and a capability
property to actually activate this clear-on-write behavior on ISR.

Reported-by: Hein Tibosch <redacted>
Signed-off-by: Nicolas Ferre <redacted>
---
 Documentation/devicetree/bindings/net/macb.txt |  2 ++
 drivers/net/ethernet/cadence/macb.c            | 15 +++++++++++++--
 drivers/net/ethernet/cadence/macb.h            |  5 +++++
 3 files changed, 20 insertions(+), 2 deletions(-)
Looks okay to me:

Acked-by: Steffen Trumtrar <redacted>

Thanks,
Steffen

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