Re: [PATCH v2 RESEND 3/6] net: calxedaxgmac: use relaxed i/o accessors in rx and tx paths

On 11/01/2012 10:21 AM, David Miller wrote:

From: Rob Herring <redacted>
Date: Thu,  1 Nov 2012 05:41:01 -0500

quoted

From: Rob Herring <redacted>

The standard readl/writel accessors involve a spinlock and cache sync
operation on ARM platforms with an outer cache. Only DMA triggering
accesses need this, so use the relaxed variants instead.

Signed-off-by: Rob Herring <redacted>
---
 drivers/net/ethernet/calxeda/Kconfig |    2 +-
 drivers/net/ethernet/calxeda/xgmac.c |   12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ethernet/calxeda/Kconfig b/drivers/net/ethernet/calxeda/Kconfig
index aba435c..6a4ddf6 100644
--- a/drivers/net/ethernet/calxeda/Kconfig
+++ b/drivers/net/ethernet/calxeda/Kconfig

@@ -1,6 +1,6 @@
 config NET_CALXEDA_XGMAC
 	tristate "Calxeda 1G/10G XGMAC Ethernet driver"
-	depends on HAS_IOMEM
+	depends on HAS_IOMEM && ARM
 	select CRC32
 	help
 	  This is the driver for the XGMAC Ethernet IP block found on Calxeda

This is a regression.  Now I can't built test this driver on x86
or sparc.

I'm not applying this series.  You can argue until the cows come home
about why you absolutley have to add this restriction, but I simply
don't care, this issue is too important to me.

I did first try fixing this in the ARM L2 code, but that was rejected as
well. It is a 20-30% performance difference.

It would be nice if we had unified accessors on all platforms. Are you
okay with adding "!(BLACKFIN || HEXAGON || M68K || MICROBLAZE ||
OPENRISC || S390 || SCORE || UNICORE32)"?

Or would you be okay with using __raw_readl/__raw_writel?

Rob