On 10/10/2012 09:10 PM, Wolfgang Grandegger wrote:

Due to a bug in most Flexcan cores, the bus error interrupt needs
to be enabled. Otherwise we don't get any error warning or passive
interrupts. This is _not_ necessary for the i.MX28 and this patch
disables bus error interrupts if "berr-reporting" is not requested.
This avoids bus error flooding, which might harm, especially on
low-end systems.

To handle such quirks of the Flexcan cores, a hardware feature flag
has been introduced, also replacing the "hw_ver" variable. We got
some version info about what Flexcan core version is available on
what Freescale SOC which have been summarized as comment.

Changes since v1:

- add known version info and hw bugs as comment
- remove FLEXCAN_HAS_BROKEN_ERR_STATE for i.MX6Q

David was quick in applying the v1 version of this patch into his tree
directly. Wolfgang can you send an incremental patch? Please change the
list of can cores, according to Dong Aisheng, the mx6 has a glitch
filter, too.

regards, Marc

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