[net-next 06/10] ixgbe: PFC not cleared on X540 devices
flat view
STALE5538d
REVIEWED: 1 (0M)
From: Jeff Kirsher <hidden>
Date: 2011-08-29 08:41:15
Subsystem:
intel ethernet drivers, networking drivers, the rest · Maintainers:
Tony Nguyen, Przemek Kitszel, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
Status: Reviewed.
1 review trailer.
From: John Fastabend <redacted> X540 devices do not clear PFC before sets. This results in the device possibly responding to PFC frames that the user has disabled. Although it would also be wrong for the peer to be transmitting these frames. Now we clear the register before set. Signed-off-by: John Fastabend <redacted> Tested-by: Ross Brattain <redacted> Signed-off-by: Jeff Kirsher <redacted> --- drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c | 4 +++- drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 1 + 2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c
index ade9820..d64fb87 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c@@ -252,8 +252,10 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en) reg &= ~IXGBE_MFLCN_RFCE; reg |= IXGBE_MFLCN_RPFCE | IXGBE_MFLCN_DPF; - if (hw->mac.type == ixgbe_mac_X540) + if (hw->mac.type == ixgbe_mac_X540) { + reg &= ~IXGBE_MFLCN_RPFCE_MASK; reg |= pfc_en << IXGBE_MFLCN_RPFCE_SHIFT; + } IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg);
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index e0d970e..9f618ee 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h@@ -1834,6 +1834,7 @@ enum { #define IXGBE_MFLCN_DPF 0x00000002 /* Discard Pause Frame */ #define IXGBE_MFLCN_RPFCE 0x00000004 /* Receive Priority FC Enable */ #define IXGBE_MFLCN_RFCE 0x00000008 /* Receive FC Enable */ +#define IXGBE_MFLCN_RPFCE_MASK 0x00000FE0 /* Receive FC Mask */ #define IXGBE_MFLCN_RPFCE_SHIFT 4
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1.7.6