Re: [PATCHv2 2/2] DM9000B: Fix PHY power for network down/up

From: Henry Nestler <redacted>
Date: Tue, 22 Feb 2011 22:29:42 +0100

DM9000 revision B needs 1 ms delay after PHY power-on.
PHY must be powered on by writing 0 into register DM9000_GPR before
all other settings will change (see Davicom spec and example code).

Remember, that register DM9000_GPR was not changed by reset sequence.

Without this fix the FIFO is out of sync and sends wrong data after
sequence of "ifconfig ethX down ; ifconfig ethX up".

I've applied both of your patches, thanks.