On Friday, October 29, 2010 9:57 PM : Marc Kleine-Budde wrote:

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SW must check busy flag of CAN register.
This is a Topcliff HW specification.

Maybe the busy check could also be done *before* the Message RAM is
accessed to avoid (or minimize) waiting.

Yes, *before* is right.
If there is *after* processing, this is a bug.
Can you see anyway ?

Sorry I don't understand what you mean.

Sorry, my English had mistake. I show my comment below again.
 - If there is *after* processing, this is a bug.
 - Can you see the point anywhere ?

You probably know the datasheet, but I don't, although I've printed
chapter 13 from the Intel Controller Hub EG20T datasheet, but it's 50+
pages. If the hardware needs the busy waiting in the hot tx path a
pointer to the respective section in the manual is a good idea. Just
something like:

Though "Oliver Hartkopp" found the place of Datasheet EG20T and notified with the mailing-list,
Have you read the following ?
http://edc.intel.com/Platforms/Atom-E6xx/#hardware

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You have to change the definition of the regs struct a bit:

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 u32 if1_mcont;
 u32 if1_data[4];
 u32 reserve2;

Uh, I can't find this. Where is this ?

Here's a patch to illustrate what I meant:

I understand.


Thanks, Tomoya(OKI SEMICONDUCTOR CO., LTD.)