Thread (15 messages) 15 messages, 4 authors, 2010-06-30

Re: b44: Reset due to FIFO overflow.

From: James Courtier-Dutton <hidden>
Date: 2010-06-29 08:42:40

On 28 June 2010 22:37, James Courtier-Dutton [off-list ref] wrote:
I tried the patch.
I also tried without the patch, but bypassed the hw reset in the RFO case.

In both cases, the hardware did not recover from the overflow.
An "ifconfig eth0 down" then "ifconfig eth0 up" was required to bring
it back to life, I.e. A manual hw reset.

What I did find is that once the RFO state is reached, it is not cleared.
I think we need to find a way to clear the RFO state.
The RFO state is cleared after a HW reset.

Kind Regards

James
Under further analysis, I have found that RFO is not cleared by a
write to bw32(bp, B44_ISTAT, istat);
whereas most other conditions should be cleared by this.

So, I went searching in the hardware reset functions for when the RFO
was cleared.

I found it:
A call to this:
ssb_device_enable(bp->sdev, 0)
in the b44_chip_reset function is what actually clears the RFO.
So, does anyone have any data sheets on the ssb ?
The ssb looks to me like the DMA engine.

On a more positive note, if we can get the ssb to reset without the
phy resetting, we could have our smooth recovery achieved.

Kind Regards

James
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