Re: Patch for tbench regression.
From: Evgeniy Polyakov <hidden>
Date: 2008-09-29 07:12:59
On Mon, Sep 29, 2008 at 03:02:13PM +0800, Herbert Xu (herbert@gondor.apana.org.au) wrote:
quoted
$ cat /proc/interrupts CPU0 0: 71 XT-PIC-XT timer 1: 8 XT-PIC-XT i8042 2: 0 XT-PIC-XT cascade 5: 17606 XT-PIC-XT eth0 12: 5 XT-PIC-XT i8042 14: 6925 XT-PIC-XT ide0 15: 141 XT-PIC-XT ide1 NMI: 0 Non-maskable interrupts LOC: 1190668 Local timer interrupts RES: 0 Rescheduling interrupts CAL: 0 function call interrupts TLB: 0 TLB shootdowns TRM: 0 Thermal event interrupts SPU: 0 Spurious interrupts ERR: 0 MIS: 0OK you're on FV as well. I'll try it on my laptaop next.
How did you find that? :)
quoted
Shouldn't tests over loopback be like lots of memcpy in the userspace process? Usually its performance is close enough to the kernel's range, despite very different sizes of TLB entries.Where it may differ is when you have context switches.
Yes, of course, even single empty syscall may potentially force process the be scheduled away, bit still performance will not be with 24/190 ratio... Weird. -- Evgeniy Polyakov