Thread (50 messages) 50 messages, 8 authors, 2008-06-18

Re: NIU - Sun Neptune 10g - Transmit timed out reset (2.6.24)

From: David Dillow <hidden>
Date: 2008-05-10 00:00:29
Also in: lkml

Possibly related (same subject, not in this thread)

On Sat, 2008-05-10 at 00:48 +0200, Jesper Krogh wrote:
Rick Jones wrote:
quoted
quoted
The number of contextswitches seems enourmous.. over 120.000 sometimes.
When transmitting around the same amount of data (4xgigabit bonded with
802.3ad) 4x110MB/s the amount of contextswitches only reaches 3-4.000. I
have no idea if this has any relevance.

Should this setup not be able to fill the pipe?
Into which slot was the Neptune inserted?  (sure will be nice to have 
Alex Chiang's pci slot id patch in mainline one of these days :)

Is that slot x4, x8, x16?
I can find out excactly .. on monday. But shouldn't x4 be enough anyway?
wikipedia says 250MB/s pr. lane. And no slots is less than x4, so I
thought that it didn't matter to me.
lspci -vvv on the slot can tell you what has been negotiated. Also, you
can figure the effective PCIe bandwidth using ~200 MB/s as a rule of
thumb, given the various overheads on the bus. So an x4 won't fully load
up a 10Gbps link.

At least, that's what we're seeing in x8 slots using Infiniband cards,
so your mileage may vary.
-- 
Dave Dillow
National Center for Computational Science
Oak Ridge National Laboratory
(865) 241-6602 office

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