Re: [PATCH 4/4] atl1: Ancillary C files for Attansic L1 driver
From: Luca Tettamanti <kronos.it@gmail.com>
Date: 2007-01-22 20:00:15
Also in:
lkml
From: Luca Tettamanti <kronos.it@gmail.com>
Date: 2007-01-22 20:00:15
Also in:
lkml
Il Sun, Jan 21, 2007 at 09:33:39PM -0600, Jay Cliburn ha scritto:
Randy Dunlap wrote:quoted
On Sun, 21 Jan 2007 15:07:37 -0600 Jay Cliburn wrote:[snip]quoted
quoted
+ value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST); + return ((value & 0xFF00) == 0x6C00) ? 0 : 1;Are there defines or enums for these? Fewer magic numbers would be nice/helpful/readable.[snip]quoted
quoted
+ s32 ret; + ret = atl1_write_phy_reg(hw, 29, 0x0029);Fewer magic numbers?Unfortunately, we don't have a spec. This is how the vendor coded it. [snip]quoted
quoted
+ +int enable_msi; +module_param(enable_msi, int, 0444); +MODULE_PARM_DESC(enable_msi, "Enable PCI MSI");Hm, I thought that we didn't want individual drivers having MSI config options...Luca? This one was yours IIRC. Care to chime in?
I remember that discussion, but since there's no sistem-wide MSI blacklist (or whitelist) I don't think it's safe to enable it unconditionally. Judging from bug reports on lkml it's not safe to assume that MSI support is sane on non-Intel chipsets. Luca -- Il coraggio non mi manca. E` la paura che mi frega...