Thread (21 messages) 21 messages, 5 authors, 2007-01-02

Re: Network card IRQ balancing with Intel 5000 series chipsets

From: Arjan van de Ven <hidden>
Date: 2006-12-25 11:35:01

On Mon, 2006-12-25 at 13:26 +0200, Robert Iakobashvili wrote:
quoted
Am I understanding you correctly that you want to spread the load of the
networking IRQ roughly equally over 2 cpus (or cores or ..)?
Yes, 4 cores.
quoted
If so, that is very very suboptimal, especially for networking (since
suddenly a lot of packet processing gets to deal with out of order
receives and cross-cpu reassembly).
Agree. Unfortunately, we have a flow of small RTP packets with heavy
processing and both Rx and Tx component on a single network card.
The application is not too much sensitive to the out of order, etc.
Thus, there 3 cores are actually doing nothing, whereas the CPU0
is overloaded, preventing system CPU scaling.
in principle the actual work should still be spread over the cores;
unless you do everything in kernel space that is..
Agree, that providing CPU affinity for a network interrupt is a rather
reasonable default.
However, should a chipset manufacture take from us the very freedom of
tuning, freedom of choice?
it can still be done using the TPR (Thread Priority Register) of the
APIC. It's just... not there in Linux (other OSes do use this).

-- 
if you want to mail me at work (you don't), use arjan (at) linux.intel.com
Test the interaction between Linux and your BIOS via http://www.linuxfirmwarekit.org
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