From: Rick Jones <redacted>
Date: Thu, 29 Jun 2006 17:28:50 -0700

I thought that most PCI controllers (that is to say the things bridging 
PCI to the rest of the system) could do prefetching and/or that PCI-X 
(if not PCI, no idea about PCI-e) cards could issue multiple 
transactions anyway?

People doing deep CMT chips have found out that all of that
prefetching and store buffering is unnecessary when everything is so
tightly integrated.

All of the previous UltraSPARC boxes before Niagara had a
streaming cache sitting on the PCI controller.  It basically
prefetched for reads and collected writes from PCI devices
into cacheline sized chunks.

The PCI controller in the current Niagara systems has none of that
stuff.