On Mon, 2006-02-27 at 09:18 -0800, Stephen Hemminger wrote:

On Mon, 27 Feb 2006 17:38:38 +0100
Wolfgang Hoffmann [off-list ref] wrote:

quoted

On Monday 27 February 2006 17:00, Stephen Hemminger wrote:
2.6.16-rc5 with disable_msi=1 works for me, no hangs seen so far. I rsynced 80 
GB of data, thats about 5-10 times more than I typically need to reproduce a 
hang, so it seems to be solid. For the record: 2.6.16-rc5 with disable_msi=0 
does hang.

I have not seen the memory trashing others reported, with no version I tested 
so far. Maybe my scenario is not likely to trigger this, so I can't tell.

Unless a fix for msi is at hand, may I suggest for 2.6.16 to revert the msi 
commit or switch the default to disable_msi=1?

I've updated bugzilla #6084 accordingly.

Okay, then what I need is lspci -v of all systems that have the problem, I'll make
a blacklist (or update PCI quirks). I suspect that MSI doesn't work for any devices
on these systems, or MSI changes the timing enough to expose existing races.

Am i just tired from trying to make XSLT to do something unnatural or is
there something odd going on in msi.c?

static void msi_set_mask_bit(unsigned int vector, int flag)
{
        struct msi_desc *entry;

        entry = (struct msi_desc *)msi_desc[vector];
        if (!entry || !entry->dev || !entry->mask_base)
                return;
        switch (entry->msi_attrib.type) {
        case PCI_CAP_ID_MSI:
        {
                int             pos;		<==
                u32             mask_bits;

                pos = (long)entry->mask_base;	<==
...

Doesn't that mean that we, a: read 64 bit from memory. b: save it in a
32 bit area?

(esp since it seems to be a address pointer, which could also be using
higher memory areas... but then i dunno what a void __iomem * is, but i
assume that it will be 64 bits here =))

-- 
Ian Kumlien <pomac () vapor ! com> -- http://pomac.netswarm.net