Thread (3 messages) 3 messages, 3 authors, 2005-06-22

Re: [PATCH] tg3_msi() and weakly ordered memory

From: Grant Grundler <hidden>
Date: 2005-06-22 05:20:12

Possibly related (same subject, not in this thread)

On Tue, Jun 21, 2005 at 04:56:34PM -0700, David S. Miller wrote:
Ok, here is the patch I came up with as a result of this thread.
looks good to me.
Michael stated he would investigate using a pure tag comparison in
place of tg3_has_work() when the chip is using tagged interrupts.
The more I think about it, the more I like the idea of each ISR calling
into a different tg3_poll routine. The specific _poll() routine could
do the "is there more work" checking instead the TX/RX ring
cleanup code. The main reason is the "more work" checks can
be better optimized for MSI (use tags) vs IRQ Line interrupt (use ring
indices) handlers. I also hope to reduce cacheline movement by touching
the status block fewer times.

This isn't a trivial patch and I'm short on time (preparing stuff
for OLS and HP World before my vacation). If there is still interest,
I can prototype a patch in late August or Sept (about 8 weeks from now).

Thanks.
Welcome and thanks too.

BTW, I greatly appreciate Michael clarifying tg3 behavior.

thanks,
grant
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