Thread (5 messages) flat view 5 messages, 4 authors, 2003-08-06

Re: TOE brain dump

From: David S. Miller <hidden>
Date: 2003-08-04 19:31:15
Also in: lkml

On Mon, 4 Aug 2003 16:24:33 -0300
Werner Almesberger [off-list ref] wrote:
Eric W. Biederman wrote:
quoted
There is one place in low latency communications that I can think
of where TCP/IP is not the proper solution.  For low latency
communication the checksum is at the wrong end of the packet.
That's one of the few things ATM's AAL5 got right.
Let's recall how long the IFF_TRAILERS hack from BSD :-)
But in the end, I think it doesn't really matter.
I tend to agree on this one.

And on the transmit side if you have more than 1 pending TX frame, you
can always be prefetching the next one into the fifo so that by the
time the medium is ready all the checksum bits have been done.

In fact I'd be surprised if current generation 1g/10g cards are not
doing something like this.
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