[PATCH v3 0/8] sparc64: add Fujitsu M3000 support

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From: Magnus Lindholm <linmag7@gmail.com>
Date: 2026-10-12 18:48:45
Also in: linux-serial, lkml, sparclinux

Revision v3 of 3 in this series.

Revisions (3)

2026-10-02 v1 [diff vs current]
2026-10-11 v2 [diff vs current]
2026-10-12 v3 current

Several years ago I salvaged an M3000 SPARC Enterprise box being
decommissioned at work. The box has been sitting ever since, as it did
not run Linux. It did not seem impossible to get Linux running, but
my earlier attempts failed. I recently found some documentation:
"SPARC JPS2: Common Specification" and the "Fujitsu SPARC64 VII
Extensions", which gave me some of the missing pieces.
Getting this up and running required extensive testing, some
kernel instrumentation, debug printouts and many reboot iterations.
For this, Codex proved very helpful. Along the way, I stumbled upon
some generic sparc and driver bugs that this series addresses as well.

This series adds CPU, MMU, SMP, Oberon PCIe and firmware console support
for the Fujitsu SPARC Enterprise M3000. It is based on v7.3-rc1.

Patches 1-5 are generic sparc64 fixes: the clear_page return, secondary
startup spinlock layout, sun4u kernel PUD mappings, IRQ allocation
failure handling and Fire firmware register-property validation.
Patches 6-8 add the M3000 support. The generic fixes are kept in this
series so that the architecture changes can be applied and tested
together.

The on-board BCM5718 also needs the separate netdev patch:

[PATCH net-next v3] tg3: normalize inherited BCM5718 register byte order
Link: https://lore.kernel.org/sparclinux/20261011194228.981141-1-linmag7@gmail.com/ (local)

That patch applies independently and is not included in this series.
It was included in the M3000 test kernel described below.

Changes since v2
---------------
- Add separate generic fixes for unchecked IRQ allocation failure and
missing or short Fire reg properties, following the Sashiko review.
IRQ setup now stops before publishing an invalid descriptor; register
properties are validated before their entries are accessed.
- Mark fill_in_one_cpu() as __init to match its initialization-only
caller and vii_cpu_topology(), fixing the section mismatch reported
by the kernel test robot.
- Address Jiri Slaby's HVC review: reorder the console state to reduce
padding, use guard()/scoped_guard() for locking, test the input
pointer directly, and name the firmware argument counts and error
return values. Keep the polling spinlock released during synchronous
timer deletion, with the mutex held to serialize close and reopen.
- Retain the raw buffer lock for atomic console calls and the existing
firmware polling policy. Zero still means zero bytes transferred;
firmware argument-array positions remain the fixed interface layout.
- Remove the leftover experimental Oberon boot message.
- Fold the CPU and HVC corrections into their respective support
patches. The two new generic fixes bring the SPARC series to eight
patches; the tg3 fix remains separate.

Testing
-------
The candidate source tree, including the separate tg3 patch, was built
with W=1 using GCC 13.3 and Clang 23.1.3. Neither build reports the
CPU topology section mismatch or warnings in the changed HVC code.
Other warnings remain in existing code. This does not reproduce the
robot's exact Clang 24 development compiler and defconfig combination.

The GCC kernel booted from disk into OpenRC and SSH on an M3000 with
all eight CPUs and 16 GiB of RAM. Bounded fork/COW, CPU migration,
file write/read verification and network transfer checks passed.
HVC checks covered output, paced input after idle, concurrent open and
close, and hangup/reopen. The kernel remained untainted, with no new
WARNING, BUG or Oops reports during these checks.

The final export plus tg3 differs from that boot-tested source tree only
by removal of the experimental Oberon boot message. It applies cleanly
to v7.3-rc1 and has been rebuilt with GCC and W=1; the final export has
not been rebooted. The Clang image was not booted. This revision has not
been retested on the Ultra45 or in UP mode, and these bounded tests do
not establish long-term stability or exercise hardware failure paths.

Current limitations
-------------------
SPARC64 VII support remains a Kconfig option because this path currently
excludes HugeTLB and THP. Removing that restriction requires further
large-page MMU work and testing. CPU offlining is not supported.

Oberon uses legacy interrupts; MSI and native bridge error recovery are
not implemented. CPU error handling is limited to the supported
restrainable ECC path; other unhandled error traps remain fatal.

The HVC backend relies on firmware calls. A firmware call that does not
return remains unbounded, and fast pasted input can exceed the firmware
FIFO. The console tests above do not establish panic-path reliability.

Magnus Lindholm (8):
sparc64: return from the generic clear_page implementation
sparc64: honor queued spinlock layout in secondary startup
sparc64: avoid huge kernel PUD mappings on sun4u
sparc64: stop IRQ setup when descriptor allocation fails
sparc64: validate Fire register properties before initialization
sparc64: add SPARC64 VII CPU, MMU and SMP support
sparc64: add M3000 Oberon PCIe support
hvc: add an M3000 firmware console backend

base-commit: cee9395acd8043be0644b25c34bfa86623f2b935

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